A Methodology for Analog Design Automation in Mixed-Signal ASICs. - Stéphane Donnay; Koen Swings; Georges G. E. Gielen; Willy M. C. Sansen; Wim Kruiskamp; Domine Leenaerts (EDAC-ETC-EUROASIC, 1994)

A high-level design and optimization tool for analog RF receiver front-ends. - Jan Crols; Stéphane Donnay; Michiel Steyaert; Georges G. E. Gielen (ICCAD, 1995)

High-level synthesis of analog sensor interface front-ends. - Stéphane Donnay; Georges G. E. Gielen; Willy M. C. Sansen; Wim Kruiskamp; Domine Leenaerts; W. van Bokhoven (ED&TC, 1997)

Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. - Jan Vandenbussche; Stéphane Donnay; Francky Leyn; Georges G. E. Gielen; Willy M. C. Sansen (DATE, 1998)

High-Level Power Minimization of Analog Sensor Interface Architectures. - Stéphane Donnay; Georges G. E. Gielen; Willy M. C. Sansen (Integr. Comput. Aided Eng., 1998)

A Single-Package Solution for Wireless Transceivers. - Piet Wambacq; Stéphane Donnay; Hocine Ziad; Marc Engels; Hugo De Man; Ivo Bolsens (DATE, 1999)

BANDIT: embedding analog-to-digital converters on digital telecom ASICs. - Stéphane Donnay; Marc van Heijningen; Mustafa Badaroglu; Wim Diels; Marc Engels; Ivo Bolsens; Yann A. Zinzius; Georges G. E. Gielen; Willy Sansen; Tony Fondén; Svante Signell (ICECS, 1999)

High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. - Piet Wambacq; Gerd Vandersteen; Stéphane Donnay; Marc Engels; Ivo Bolsens; Erik Lauwers; Piet Vanassche; Georges G. E. Gielen (ICECS, 1999)

High-level simulation of substrate noise generation including power supply noise coupling. - Marc van Heijningen; Mustafa Badaroglu; Stéphane Donnay; Marc Engels; Ivo Bolsens (DAC, 2000)

A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. - Gerd Vandersteen; Piet Wambacq; Yves Rolain; Petr Dobrovolný; Stéphane Donnay; Marc Engels; Ivo Bolsens (DAC, 2000)

Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. - Piet Wambacq; Petr Dobrovolný; Stéphane Donnay; Marc Engels; Ivo Bolsens (DATE, 2000)

Analysis and experimental verification of digital substrate noise generation for epi-type substrates. - Marc van Heijningen; John Compiet; Piet Wambacq; Stéphane Donnay; Marc Engels; Ivo Bolsens (IEEE J. Solid State Circuits, 2000)

Chip-package codesign of a low-power 5-GHz RF front end. - Stéphane Donnay; Philip Pieters; Kristof Vaesen; Wim Diels; Piet Wambacq; Walter De Raedt; Eric Beyne; Marc Engels; Ivo Bolsens (Proc. IEEE, 2000)

High-level simulation of substrate noise generation from large digital circuits with multiple supplies. - Mustafa Badaroglu; Marc van Heijningen; Vincent Gravot; Stéphane Donnay; Hugo De Man; Georges G. E. Gielen; Marc Engels; Ivo Bolsens (DATE, 2001)

Efficient bit-error-rate estimation of multicarrier transceivers. - Gerd Vandersteen; Piet Wambacq; Yves Rolain; Johan Schoukens; Stéphane Donnay; Marc Engels; Ivo Bolsens (DATE, 2001)

OFDM versus Single Carrier with Cyclic Prefix: a system-based comparison. - Jan Tubbax; Boris Come; Liesbet Van der Perre; Luc Deneire; Stéphane Donnay; Marc Engels (VTC Fall, 2001)

A Mixed-Signal Design Roadmap. - Ralf Brederlow; Werner Weber; Joseph Sauerer; Stéphane Donnay; Piet Wambacq; Maarten Vertregt (IEEE Des. Test Comput., 2001)

Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. - Mustafa Badaroglu; Kris Tiri; Stéphane Donnay; Piet Wambacq; Hugo De Man; Ingrid Verbauwhede; Georges G. E. Gielen (DAC, 2002)

Analysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach . - Michaël Goffioul; Piet Wambacq; Gerd Vandersteen; Stéphane Donnay (DATE, 2002)

High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions. - Gerd Vandersteen; Piet Wambacq; Stéphane Donnay; Frans Verbeyst (DATE, 2002)

Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits. - Mustafa Badaroglu; Marc van Heijningen; Vincent Gravot; John Compiet; Stéphane Donnay; Georges G. E. Gielen; Hugo J. De Man (IEEE J. Solid State Circuits, 2002)

Substrate noise generation in complex digital systems: efficient modeling and simulation methodology and experimental verification. - Marc van Heijningen; Mustafa Badaroglu; Stéphane Donnay; Georges G. E. Gielen; Hugo J. De Man (IEEE J. Solid State Circuits, 2002)

4G terminals: how are we going to design them? - Jan Craninckx; Stéphane Donnay (DAC, 2003)

Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits. - Petr Dobrovolný; Gerd Vandersteen; Piet Wambacq; Stéphane Donnay (DATE, 2003)

Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver. - Wolfgang Eberle; Gerd Vandersteen; Piet Wambacq; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (DATE, 2003)

Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate. - Mustafa Badaroglu; Lakshmanan Balasubramanian; Kris Tiri; Vincent Gravot; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (ESSCIRC, 2003)

A linear high voltage charge pump for MEMs applications in 0.18μm CMOS technology. - Manuel Innocent; Piet Wambacq; Stéphane Donnay; Willy Sansen; Hugo De Man (ESSCIRC, 2003)

Joint compensation of IQ imbalance and frequency offset in OFDM systems. - Jan Tubbax; Andrew Fort; Liesbet Van der Perre; Stéphane Donnay; Marc Engels; Marc Moonen; Hugo De Man (GLOBECOM, 2003)

Compensation of IQ imbalance in OFDM systems. - Jan Tubbax; Boris Come; Liesbet Van der Perre; Luc Deneire; Stéphane Donnay; Marc Engels (ICC, 2003)

Single-carrier communication using decision-feedback equalization for multiple antennas. - Jan Tubbax; Liesbet Van der Perre; Stéphane Donnay; Marc Engels (ICC, 2003)

Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies. - Mustafa Badaroglu; Stéphane Donnay; Hugo J. De Man; Yann A. Zinzius; Georges G. E. Gielen; Willy Sansen; Tony Fondén; Svante Signell (IEEE J. Solid State Circuits, 2003)

Analysis and compact behavioral modeling of nonlinear distortion in analog communication circuits. - Petr Dobrovolný; Gerd Vandersteen; Piet Wambacq; Stéphane Donnay (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

An analytic Volterra-series-based model for a MEMS variable capacitor. - Manuel Innocent; Piet Wambacq; Stéphane Donnay; Harrie A. C. Tilmans; Willy M. C. Sansen; Hugo De Man (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Impact of technology scaling on substrate noise generation mechanisms [mixed signal ICs]. - Mustafa Badaroglu; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (CICC, 2004)

A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor. - Dimitri Linten; Xiao Sun; Geert Carchon; Wutthinan Jeamsaksiri; Abdelkarim Mercha; Javier Ramos; Snezana Jenei; Lars Aspemyr; Andries J. Scholten; Piet Wambacq; Stefaan Decoutere; Stéphane Donnay; et al. (CICC, 2004)

High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. - Geert Van der Plas; Mustafa Badaroglu; Gerd Vandersteen; Petr Dobrovolný; Piet Wambacq; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (DAC, 2004)

Digital Ground Bounce Reduction by Phase Modulation of the Clock. - Mustafa Badaroglu; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (DATE, 2004)

Extended Subspace Identification of Improper Linear Systems. - Gerd Vandersteen; Rik Pintelon; Dimitri Linten; Stéphane Donnay (DATE, 2004)

A harmonic quadrature LO generator using a 90° delay-locked loop [zero-IF transceiver applications]. - Jan Craninckx; Vincent Gravot; Stéphane Donnay (ESSCIRC, 2004)

Performance degradation of an LC-tank VCO by impact of digital switching noise. - Charlotte Soens; Geert Van der Plas; Piet Wambacq; Stéphane Donnay (ESSCIRC, 2004)

Compensation of transmitter IQ imbalance for OFDM systems. - Jan Tubbax; Boris Come; Liesbet Van der Perre; Stéphane Donnay; Marc Moonen; Hugo De Man (ICASSP (2), 2004)

Joint compensation of IQ imbalance, frequency offset and phase noise in OFDM receivers. - Jan Tubbax; Liesbet Van der Perre; Stéphane Donnay; Marc Engels; Marc Moonen; Hugo De Man (Eur. Trans. Telecommun., 2004)

Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate. - Mustafa Badaroglu; Geert Van der Plas; Piet Wambacq; Lakshmanan Balasubramanian; Kris Tiri; Ingrid Verbauwhede; Stéphane Donnay; Georges G. E. Gielen; Hugo J. De Man (IEEE J. Solid State Circuits, 2004)

Substrate noise immune design of an LC-tank VCO using sensitivity functions. - Charlotte Soens; Geert Van der Plas; Piet Wambacq; Stéphane Donnay (CICC, 2005)

Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. - Charlotte Soens; Geert Van der Plas; Piet Wambacq; Stéphane Donnay (DATE, 2005)

Ultra wide-band body area channel model. - Andrew Fort; Claude Desset; Julien Ryckaert; Philippe De Doncker; Leo Van Biesen; Stéphane Donnay (ICC, 2005)

Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors. - Dimitri Linten; Xiao Sun; Geert Carchon; Wutthinan Jeamsaksiri; Abdelkarim Mercha; Javier Ramos; Snezana Jenei; Piet Wambacq; Morin Dehan; Lars Aspemyr; Andries J. Scholten; Stefaan Decoutere; et al. (IEEE J. Solid State Circuits, 2005)

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS. - Dimitri Linten; Steven Thijs; Mahadeva Iyer Natarajan; Piet Wambacq; Wutthinan Jeamsaksiri; Javier Ramos; Abdelkarim Mercha; Snezana Jenei; Stéphane Donnay; Stefaan Decoutere (IEEE J. Solid State Circuits, 2005)

Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates. - Charlotte Soens; Geert Van der Plas; Piet Wambacq; Stéphane Donnay; Maarten Kuijk (IEEE J. Solid State Circuits, 2005)

Digital ground bounce reduction by supply current shaping and clock frequency Modulation. - Mustafa Badaroglu; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Ultra-wide-band transmitter for low-power wireless body area networks: design and evaluation. - Julien Ryckaert; Claude Desset; Andrew Fort; Mustafa Badaroglu; Vincent De Heyn; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Bart van Poucke; Bert Gyselinckx (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Compensation of IQ imbalance and phase noise in OFDM systems. - Jan Tubbax; Boris Come; Liesbet Van der Perre; Stéphane Donnay; Marc Engels; Hugo De Man; Marc Moonen (IEEE Trans. Wirel. Commun., 2005)

A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process. - Geert Van der Plas; Stefaan Decoutere; Stéphane Donnay (ISSCC, 2006)

Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate. - Charlotte Soens; Geert Van der Plas; Mustafa Badaroglu; Piet Wambacq; Stéphane Donnay; Yves Rolain; Maarten Kuijk (IEEE J. Solid State Circuits, 2006)

Technologies for highly miniaturized autonomous sensor networks. - Kris Baert; Bert Gyselinckx; Tom Torfs; Vladimir Leonov; Refet Firat Yazicioglu; Steven Brebels; Stéphane Donnay; J. Vanfletern; M. Pastreen; Eric Beyne; Chris Van Hoof (Microelectron. J., 2006)

Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. - Mustafa Badaroglu; Kris Tiri; Geert Van der Plas; Piet Wambacq; Ingrid Verbauwhede; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Evolution of substrate noise generation mechanisms with CMOS technology scaling. - Mustafa Badaroglu; Piet Wambacq; Geert Van der Plas; Stéphane Donnay; Georges G. E. Gielen; Hugo J. De Man (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

SWAN: high-level simulation methodology for digital substrate noise generation. - Mustafa Badaroglu; Geert Van der Plas; Piet Wambacq; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Scalable Gate-Level Models for Power and Timing Analysis. - Mustafa Badaroglu; Geert Van der Plas; Piet Wambacq; Stéphane Donnay; Georges G. E. Gielen; Hugo De Man (ISCAS, 2007)