Defect tolerant probabilistic design paradigm for nanotechnologies. - Margarida F. Jacome; Chen He; Gustavo de Veciana; Stephen Bijansky (DAC, 2004)

TuneFPGA: post-silicon tuning of dual-Vdd FPGAs. - Stephen Bijansky; Adnan Aziz (DAC, 2008)

Adaptive SRAM memory for low power and high yield. - Baker Mohammad; Stephen Bijansky; Adnan Aziz; Jacob A. Abraham (ICCD, 2008)

TuneLogic: Post-silicon tuning of dual-Vdd designs. - Stephen Bijansky; Sae Kyu Lee; Adnan Aziz (ISQED, 2009)