Load-Aware Redundant Via Insertion for Electromigration Avoidance. - Steve Bigalke; Jens Lienig (ISPD, 2016)

Exploring the use of the finite element method for electromigration analysis in future physical design. - Matthias Thiele; Steve Bigalke; Jens Lienig (VLSI-SoC, 2017)

Electromigration Analysis of VLSI Circuits Using the Finite Element Method. - Matthias Thiele; Steve Bigalke; Jens Lienig (VLSI-SoC (Selected Papers), 2017)

The need and opportunities of electromigration-aware integrated circuit design. - Steve Bigalke; Jens Lienig; Göran Jerke; Jürgen Scheible; Roland Jancke (ICCAD, 2018)

Increasing EM Robustness of Placement and Routing Solutions based on Layout-Driven Discretization. - Steve Bigalke; Jens Lienig; Thorben Casper; Sebastian Schöps (PRIME, 2018)

FLUTE-EM: Electromigration-Optimized Net Considering Topology Currents and Mechanical Stress. - Steve Bigalke; Jens Lienig (VLSI-SoC, 2018)

Avoidance vs. repair: New approaches to increasing electromigration robustness in VLSI routing. - Steve Bigalke; Jens Lienig (Integr., 2020)