A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8× oversampling ratio. - Ichiro Fujimori; Lorenzo Longo; Armond Hairapetian; Kazushi Seiyama; Steve Kosic; Jun Cao 001; Shu-Lap Chan (IEEE J. Solid State Circuits, 2000)

A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC. - Janet Brunsilius; Eric Siragusa; Steve Kosic; Frank Murden; Ege Yetis; Binh Luu; Jeff Bray; Phil Brown; Allen Barlow (ISSCC, 2011)

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steve Kosic; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; et al. (ISSCC, 2017)