An Analogue CMOS Defuzzication Circuit with Representation of Triangular Membership Functions. - S. Pammu; Steven F. Quigley (ISCAS, 1994)

A Novel Field Programmable Gat Array Architecture for High Speed Arithmetic Processing. - N. L. Miller; Steven F. Quigley (FPL, 1998)

An investigation of the effect of synapse transfer characteristic on the performance of analogue neural networks. - B. Foruzandeh; Steven F. Quigley (ICECS, 1999)

An analogue multilayer perceptron circuit with on-chip training. - B. Foruzandeh; Steven F. Quigley (ISCAS (5), 1999)

Reconfigurable Computing for Speech Recognition: Preliminary Findings. - Stephen J. Melnikoff; Philip James-Roxby; Steven F. Quigley; Martin J. Russell (FPL, 2000)

Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic. - Stephen J. Melnikoff; Steven F. Quigley; Martin J. Russell (FPL, 2001)

Evaluation of an FPGA Implementation of the Discrete Element Method. - Benjamin Carrión Schäfer; Steven F. Quigley; Andrew H. C. Chan (FPL, 2001)

Implementing a Simple Continuous Speech Recognition System on an FPGA. - Stephen J. Melnikoff; Steven F. Quigley; Martin J. Russell (FCCM, 2002)

Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable Computing. - Benjamin Carrión Schäfer; Steven F. Quigley; Andrew H. C. Chan (FCCM, 2002)

System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors. - Stephen Charlwood; Jonathan Mangnall; Steven F. Quigley (FPL, 2002)

Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models. - Stephen J. Melnikoff; Steven F. Quigley; Martin J. Russell (FPL, 2002)

Scalable Implementation of the Discrete Element Method on a Reconfigurable Computing Platform. - Benjamin Carrión Schäfer; Steven F. Quigley; Andrew H. C. Chan (FPL, 2002)

Performing speech recognition on multiple parallel files using continuous hidden Markov models on an FPGA. - Stephen J. Melnikoff; Steven F. Quigley; Martin J. Russell (FPT, 2002)

The Impact of Routing Architecture on Reconfiguration Overheads. - Stephen Charlwood; Steven F. Quigley (Engineering of Reconfigurable Systems and Algorithms, 2003)

System Level Simulation of a SIMD Active Memory Enhanced PC (Or, Why We Don't Want 100% Bandwidth Utilisation. - Jonathan Mangnall; Steven F. Quigley (IPDPS, 2003)

A Fokker-Planck equation method predicting Buffer occupancy in a single queue. - Dawn Sasha Lynette Dolcy; Costas C. Constantinou; Steven F. Quigley (Comput. Networks, 2007)

An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor. - Jing Hu 006; Steven F. Quigley; Andrew Chan 002 (FPL, 2008)

Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST. - Abdallatif S. Abu-Issa; Steven F. Quigley (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

A GMM-Based Speaker Identification System on FPGA. - Phak Len Eh Kan; Tim Allen; Steven F. Quigley (ARC, 2010)

Multi-degree smoother for low power consumption in single and multiple scan-chains BIST. - Abdallatif S. Abu-Issa; Steven F. Quigley (ISQED, 2010)

FPGA Implementation for GMM-Based Speaker Identification. - Phaklen EhKan; Tim Allen; Steven F. Quigley (Int. J. Reconfigurable Comput., 2011)

Implementation of Log-Add Algorithm for GMM-Based Speaker Identification on FPGA. - Phaklen EhKan; Naufal Alee; R. Badlishah Ahmad; Steven F. Quigley; T. Allen (ICISA, 2013)

A fast scalable implementation of the two-dimensional triangular Discrete Element Method on a GPU platform. - Lin Zhang 018; Steven F. Quigley; Andrew H. C. Chan (Adv. Eng. Softw., 2013)