Interconnects in the Third Dimension: Design Challenges for 3D ICs. - Kerry Bernstein; Paul S. Andry; Jerome Cann; Philip G. Emma; David Greenberg; Wilfried Haensch; Mike Ignatowski; Steven J. Koester; John Magerlein; Ruchir Puri; Albert M. Young (DAC, 2007)

Wafer-level 3D integration technology. - Steven J. Koester; Albert M. Young; Roy R. Yu; Sampath Purushothaman; Kuan-Neng Chen; Douglas C. La Tulipe Jr.; Narender Rana; Leathen Shi; Matthew R. Wordeman; Edmund J. Sprogis (IBM J. Res. Dev., 2008)

Low power circuit design based on heterojunction tunneling transistors (HETTs). - Daeyeon Kim; Yoonmyung Lee; Jin Cai; Isaac Lauer; Leland Chang; Steven J. Koester; Dennis Sylvester; David T. Blaauw (ISLPED, 2009)

Practical Strategies for Power-Efficient Computing Technologies. - Leland Chang; David J. Frank; Robert K. Montoye; Steven J. Koester; Brian L. Ji; Paul W. Coteus; Robert H. Dennard; Wilfried Haensch (Proc. IEEE, 2010)

Low-Power Circuit Analysis and Design Based on Heterojunction Tunneling Transistors (HETTs). - Yoonmyung Lee; Daeyeon Kim; Jin Cai; Isaac Lauer; Leland Chang; Steven J. Koester; David T. Blaauw; Dennis Sylvester (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Leakage Modeling for Devices with Steep Sub-threshold Slope Considering Random Threshold Variations. - Ayan Paul; Chaitanya Kshirsagar; Sachin S. Sapatnekar; Steven J. Koester; Chris H. Kim (VLSID, 2014)

Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor. - Jongyeon Kim; Ayan Paul; Paul A. Crowell; Steven J. Koester; Sachin S. Sapatnekar; Jianping Wang 006; Chris H. Kim (Proc. IEEE, 2015)

Acetone sensing using graphene quantum capacitance varactors. - Rui Ma; Qun Su; Jing Li; Steven J. Koester (IEEE SENSORS, 2016)

Glucose sensing with graphene varactors. - Yao Zhang; Rui Ma; Yogish C. Kudva; Philippe Buhlmann; Steven J. Koester (IEEE SENSORS, 2016)

A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited. - Jianping Wang 006; Sachin S. Sapatnekar; Chris H. Kim; Paul A. Crowell; Steven J. Koester; Supriyo Datta; Kaushik Roy 001; Anand Raghunathan; Xiaobo Sharon Hu; Michael T. Niemier; Azad Naeemi; Chia-Ling Chien; et al. (DAC, 2017)

Benchmarking Inverse Rashba-Edelstein Magnetoelectric Devices for Neuromorphic Computing. - Andrew W. Stephan; Jiaxi Hu; Steven J. Koester (CoRR, 2018)

Non-volatile Capacitance Tuning in Graphene/(Hf, Zr)O2/Metal Varactors. - V. R. Saran Kumar Chaganti; Yao Zhang; Steven J. Koester (DRC, 2019)

Low Cost Hybrid Spin-CMOS Compressor for Stochastic Neural Networks. - Bingzhe Li; Jiaxi Hu; M. Hassan Najafi; Steven J. Koester; David J. Lilja (ACM Great Lakes Symposium on VLSI, 2019)

Convolutional Neural Networks Utilizing Multifunctional Spin-Hall MTJ Neurons. - Andrew W. Stephan; Steven J. Koester (CoRR, 2019)

Nonvolatile Spintronic Memory Cells for Neural Networks. - Andrew W. Stephan; Qiuwen Lou; Michael T. Niemier; Xiaobo Sharon Hu; Steven J. Koester (CoRR, 2019)

SHE-MTJ Circuits for Convolutional Neural Networks. - Andrew W. Stephan; Steven J. Koester (CoRR, 2020)

Spin-Hall MTJ Cells for Intra-Column Competition in Hierarchical Temporal Memory. - Andrew W. Stephan; Steven J. Koester (CoRR, 2020)

Supervised Learning in Temporally-Coded Spiking Neural Networks with Approximate Backpropagation. - Andrew W. Stephan; Brian Gardner; Steven J. Koester; André Grüning (CoRR, 2020)

Content Addressable Memory Design with Reference Resistor for Improved Search Resolution. - Siri Narla; Steven J. Koester; Rebecca A. Dawley; Ageeth A. Bol; Piyush Kumar; Azad Naeemi (CoRR, 2025)