Transistor aging and reliability in 14nm tri-gate technology. - Steven R. Novak; C. Parker; D. Becher; M. Liu; Marty Agostinelli; M. Chahal; P. Packan; P. Nayak; Stephen Ramey; S. Natarajan (IRPS, 2015)

Transistor reliability variation correlation to threshold voltage. - Stephen Ramey; M. Chahal; P. Nayak; Steven R. Novak; Chetan Prasad; Jeffery Hicks (IRPS, 2015)

Modeling Framework for Transistor Aging Playback in Advanced Technology Nodes. - Inanc Meric; Stephen Ramey; Steven R. Novak; S. Gupta; S. P. Mudanai; Jeffrey Hicks (IRPS, 2020)

Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking. - Chetan Prasad; Sunny Chugh; Hannes Greve; I-chen Ho; Enamul Kabir; Cheyun Lin; Mahjabin Maksud; Steven R. Novak; Benjamin Orr; Keun Woo Park; Anthony Schmitz; Zhizheng Zhang 006; et al. (IRPS, 2020)