Surprising creativity: a cognitive framework for interactive exhibits designed for children. - Su Zheng; Adrian Bromage; Martin Adam; Stephen A. R. Scrivener (Creativity & Cognition, 2007)

Targeted Black-Box Adversarial Attack Method for Image Classification Models. - Su Zheng; Jialin Chen; Lingli Wang (IJCNN, 2019)

FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays. - Su Zheng; Kaisen Zhang; Yaoguang Tian; Wenbo Yin; Lingli Wang; Xuegong Zhou (FPT, 2021)

GRAEBO: FPGA General Routing Architecture Exploration via Bayesian Optimization. - Su Zheng; Jiadong Qian; Hao Zhou 008; Lingli Wang (FPL, 2022)

Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization. - Yao Lu; Jide Zhang; Su Zheng; Zhen Li; Lingli Wang (ISCAS, 2022)

HEAM: High-Efficiency Approximate Multiplier optimization for Deep Neural Networks. - Su Zheng; Zhen Li; Yao Lu; Jingbo Gao; Jide Zhang; Lingli Wang (ISCAS, 2022)

Adaptable Approximate Multiplier Design Based on Input Distribution and Polarity. - Zhen Li; Su Zheng; Jide Zhang; Yao Lu; Jingbo Gao; Jun Tao 001; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2022)

OpenILT: An Open Source Inverse Lithography Technique Framework (Invited Paper). - Su Zheng; Bei Yu 001; Martin D. F. Wong (ASICON, 2023)

Mitigating Distribution Shift for Congestion Optimization in Global Placement. - Su Zheng; Lancheng Zou; Siting Liu 002; Yibo Lin; Bei Yu 001; Martin D. F. Wong (DAC, 2023)

LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing. - Su Zheng; Haoyu Yang; Binwu Zhu; Bei Yu 001; Martin D. F. Wong (NeurIPS, 2023)

Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization. - Su Zheng; Hao Geng; Chen Bai; Bei Yu 001; Martin D. F. Wong (ACM Trans. Design Autom. Electr. Syst., 2023)

SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design. - Shixin Chen; Su Zheng; Chen Bai; Wenqian Zhao; Shuo Yin; Yang Bai; Bei Yu 001 (ASPDAC, 2024)

Fracturing-aware Curvilinear ILT via Circular E-beam Mask Writer. - Xinyun Zhang; Su Zheng; Guojin Chen; Binwu Zhu; Hong Xu 001; Bei Yu 001 (DAC, 2024)

EMOGen: Enhancing Mask Optimization via Pattern Generation. - Su Zheng; Yuzhe Ma; Bei Yu 001; Martin D. F. Wong (DAC, 2024)

RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization. - Peng Xu; Su Zheng; Yuyang Ye 001; Chen Bai; Siyuan Xu; Hao Geng; Tsung-Yi Ho; Bei Yu 001 (ICCAD, 2024)

Improving Neural ODE Training with Temporal Adaptive Batch Normalization. - Su Zheng; Zhengqi Gao; Fan-Keng Sun; Duane S. Boning; Bei Yu 001; Martin D. F. Wong (NeurIPS, 2024)

L2O-ILT: Learning to Optimize Inverse Lithography Techniques. - Binwu Zhu; Su Zheng; Ziyang Yu 001; Guojin Chen; Yuzhe Ma; Fan Yang 001; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration. - Shixin Chen; Shanyi Li; Zhen Zhuang; Su Zheng; Zheng Liang 003; Tsung-Yi Ho; Bei Yu 001; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration. - Sichao Chen; Chang Cai; Su Zheng; Jiangnan Li; Guowei Zhu; Jingyuan Li 003; Yazhou Yan; Yuan Dai; Wenbo Yin; Lingli Wang (ACM Trans. Reconfigurable Technol. Syst., 2024)

ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. - Haoyuan Wu; Zhuolun He; Xinyun Zhang; Xufeng Yao; Su Zheng; Haisheng Zheng; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

TorchResist: Open-Source Differentiable Resist Simulator. - Zixiao Wang; Jieya Zhou; Su Zheng; Shuo Yin; Kaichao Liang; Shoubo Hu; Xiao Chen; Bei Yu 001 (CoRR, 2025)

LLM-DSE: Searching Accelerator Parameters with LLM Agents. - Hanyu Wang; Xinrui Wu; Zijian Ding; Su Zheng; Chengyue Wang 002; Tony Nowatzki; Yizhou Sun; Jason Cong (CoRR, 2025)

RuleLearner: OPC Rule Extraction From Inverse Lithography Technique Engine. - Ziyang Yu 001; Su Zheng; Wenqian Zhao; Shuo Yin; Xiaoxiao Liang; Guojin Chen; Yuzhe Ma; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction. - Lancheng Zou; Su Zheng; Peng Xu; Siting Liu 002; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Bridging Hotspot Detection and Mask Optimization via Domain-Crossing Masked Layout Modeling. - Binwu Zhu; Su Zheng; Yuzhe Ma; Bei Yu 001; Martin D. F. Wong (ACM Trans. Design Autom. Electr. Syst., 2025)