Implementation and use of SPFDs in optimizing Boolean networks. - Subarnarekha Sinha; Robert K. Brayton (ICCAD, 1998)

Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks. - Subarnarekha Sinha; Sunil P. Khatri; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (ICCD, 2000)

Sequential SPFDs. - Subarnarekha Sinha; Andreas Kuehlmann; Robert K. Brayton (ICCAD, 2001)

Optimization of Multi-Valued Multi-Level Networks. - Robert K. Brayton; M. Gao; Jie-Hong Roland Jiang; Yunjian Jiang; Yinghua Li; Alan Mishchenko; Subarnarekha Sinha; Tiziano Villa (ISMVL, 2002)

Topologically Constrained Logic Synthesis. - Subarnarekha Sinha; Alan Mishchenko; Robert K. Brayton (IWLS, 2002)

SPFD-based wire removal in standard-cell and network-of-PLA circuits. - Sunil P. Khatri; Subarnarekha Sinha; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Using simulation and satisfiability to compute flexibilities in Boolean networks. - Alan Mishchenko; Jin S. Zhang; Subarnarekha Sinha; Jerry R. Burch; Robert K. Brayton; Malgorzata Chrzanowska-Jeske (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Automating Logic Rectification by Approximate SPFDs. - Yu-Shen Yang; Subarnarekha Sinha; Andreas G. Veneris; Robert K. Brayton (ASP-DAC, 2007)