Low-Power FSM Synthesis Based on Automated Power and Clock Gating Technique. - Abhishek Nag; Subhajit Das 004; Sambhu Nath Pradhan (J. Circuits Syst. Comput., 2019)

Low power transistor level synthesis of finite state machines using a novel dual gating technique. - Abhishek Nag; Subhajit Das 004; Sambhu Nath Pradhan (Int. J. Embed. Syst., 2020)