Power and area-efficient static current mode logic frequency divider in 180-nm complementary metal-oxide-semiconductor technology. - Subhanil Maity; Sanjay Kumar Jana; Indranil Som; Tarun Kanti Bhattacharyya (Int. J. Circuit Theory Appl., 2021)

Design of a Power-Performance-Area (PPA) Optimized MOS Current Mode Logic Pre-scaler. - Subhanil Maity; Sanjay Kumar Jana (Circuits Syst. Signal Process., 2023)

A Design Approach for ZigBee Compatible CML-based 2/3 Dual Modulus Frequency Divider. - Lokenath Kundu; Subhanil Maity; Sourav Nath; Gaurav Singh Baghel; Krishna Lal Baishnab (VDAT, 2024)

Design of a low-power, low-PDP dual modulus CML frequency divider for ZigBee application. - Lokenath Kundu; Subhanil Maity; Sourav Nath; Gaurav Singh Baghel; Krishna Lal Baishnab (Integr., 2025)

Design of CML-Based Odd Frequency Divider Using Delay Cell for Low-Power Application. - Lokenath Kundu; Subhanil Maity; Sourav Nath; Gaurav Singh Baghel; Krishna Lal Baishnab (J. Circuits Syst. Comput., 2025)