Parasitic Aware Automatic Analog CMOS Circuit Design Environment Using ABC Algorithm. - Subhash J. Patel; Rajesh Amratlal Thakker (VLSID, 2018)

Parasitic-Aware Automatic Analog CMOS Circuit Design Environment. - Subhash Jagadishchandra Patel; Rajesh Amratlal Thakker (VLSID, 2019)

Parameter Space Exploration for Analog Circuit Design Using Enhanced Bee Colony Algorithm. - Subhash J. Patel; Rajesh Amratlal Thakker (J. Circuits Syst. Comput., 2019)