Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (Embedded Software for SoC, 2003)

Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (DATE, 2003)

On the Effectiveness of Flow Aggregation in Improving Instruction Reuse in Network Processing Applications. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (Int. J. Parallel Program., 2003)

Exploiting program execution phases to trade power and performance for media workload. - Subhasis Banerjee; G. Surendra; S. K. Nandy 001 (ASP-DAC, 2004)

Power-performance trade-off using pipeline delays. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (ASP-DAC, 2004)

On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (WMPI, 2004)

Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations. - G. Surendra; Subhasis Banerjee; S. K. Nandy 001 (J. Embed. Comput., 2006)

Program Phase Directed Dynamic Cache Way Reconfiguration for Power Efficiency. - Subhasis Banerjee; G. Surendra; S. K. Nandy 001 (ASP-DAC, 2007)

On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation. - Subhasis Banerjee; G. Surendra; S. K. Nandy 001 (J. Syst. Archit., 2008)

Scissors: Dealing with header redundancies in data centers through SDN. - Kalapriya Kannan; Subhasis Banerjee (CNSM, 2012)

Compact TCAM: Flow Entry Compaction in TCAM for Power Aware SDN. - Kalapriya Kannan; Subhasis Banerjee (ICDCN, 2013)

SARROD: SPARQL Analyzer and Reordering for Runtime Optimization on Big Data. - Nishtha Tripathi; Subhasis Banerjee (BDA, 2014)

Tag-In-Tag: Efficient flow table management in SDN switches. - Subhasis Banerjee; Kalapriya Kannan (CNSM, 2014)

FlowMaster: Early Eviction of Dead Flow on SDN Switches. - Kalapriya Kannan; Subhasis Banerjee (ICDCN, 2014)

On the applicability of simple cache models for modern processors. - Rakhi Hemani; Subhasis Banerjee; Apala Guha (ICGHPC, 2016)

Easy and expressive LLC contention model. - Rakhi Hemani; Subhasis Banerjee; Apala Guha (HPCS, 2016)

The interaction of last-level-cache mechanisms on modern processors. - Rakhi Hemani; Subhasis Banerjee; Apala Guha (MEMSYS, 2017)

Performance Engineering for Deep Learning Adaptation of Seismic Processing Workflow. - Subhasis Banerjee; Aniruddha Panda; Saurabh Chawdhary; Pandu Devarakota (COMAD/CODS, 2022)

HiPC 2024 WORKSHOP 3: 1st Workshop on AI for Scientific and General Purpose Computing (AI-SPC 2024). - Subhasis Banerjee; Pradeep Rao (HIPCW, 2024)

FNOPerf: A Robust Empirical Model for Predicting LLM Performance. - Mitali Sinha; Lalson Vincent; Mudit Sand; Subhasis Banerjee (HIPCW, 2024)

GPU Accelerated Construction of Time Respecting Data Structure for Temporal Graphs. - Animan Naskar; Venkata Kalyan Tavva; Subhasis Banerjee (HPEC, 2024)