FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code. - Swagata Mandal; Suman Sau; Amlan Chakrabarti; Sushanta Kumar Pal; Subhasish Chattopadhyay (ATS, 2015)

FPGA Based Novel High Speed DAQ System Design with Error Correction. - Swagata Mandal; Suman Sau; Amlan Chakrabarti; Jogendra Saini; Sushanta Kumar Pal; Subhasish Chattopadhyay (ISVLSI, 2015)

A Novel Method for Soft Error Mitigation in FPGA using Adaptive Cross Parity Code. - Swagata Mandal; Rourab Paul; Suman Sau; Amlan Chakrabarti; Subhasis Chattopadhyay (CoRR, 2015)

FPGA based High Speed Data Acquisition System for High Energy Physics Application. - Swagata Mandal; Suman Sau; Amlan Chakrabarti; Subhasis Chattopadhyay (CoRR, 2015)

High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator. - Suman Sau; Swagata Mandal; Jogender Saini; Amlan Chakrabarti; Subhasis Chattopadhyay (CoRR, 2015)

A Novel Method for Soft Error Mitigation in FPGA Using Modified Matrix Code. - Swagata Mandal; Rourab Paul; Suman Sau; Amlan Chakrabarti; Subhasis Chattopadhyay (IEEE Embed. Syst. Lett., 2016)

Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware. - Swagata Mandal; Rourab Paul; Suman Sau; Amlan Chakrabarti; Subhasis Chattopadhyay (Microprocess. Microsystems, 2017)

Parallelization of Garfield++ and neBEM to simulate space-charge effects in RPCs. - Tanay Dey; Purba Bhattacharya; Supratik Mukhopadhyay; Nayana Majumdar; Abhishek Seal; Subhasis Chattopadhyay (Comput. Phys. Commun., 2024)