An efficient approach to model distortion in weakly nonlinear Gm - C filters. - Amitava Banerjee; Subho Chatterjee; Amit Patra; Siddhartha Mukhopadhyay (ISCAS, 2008)

A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation. - Amal Kumar Kundu; Subho Chatterjee; Tarun Kanti Bhattacharyya (VLSI Design, 2008)

A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies. - Subho Chatterjee; Mitchelle Rasquinha; Sudhakar Yalamanchili; Saibal Mukhopadhyay (ICCAD, 2009)

A circuit-software co-design approach for improving EDP in reconfigurable frameworks. - Somnath Paul; Subho Chatterjee; Saibal Mukhopadhyay; Swarup Bhunia (ICCAD, 2009)

Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study. - Subho Chatterjee; Sayeef S. Salahuddin; Satish Kumar; Saibal Mukhopadhyay (ISLPED, 2010)

An energy efficient cache design using spin torque transfer (STT) RAM. - Mitchelle Rasquinha; Dhruv Choudhary; Subho Chatterjee; Saibal Mukhopadhyay; Sudhakar Yalamanchili (ISLPED, 2010)

Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes. - Subho Chatterjee; Sayeef S. Salahuddin; Saibal Mukhopadhyay (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Power Aware Post-manufacture Tuning of Analog Nanocircuits. - Aritra Banerjee; Subho Chatterjee; Azad Naeemi; Abhijit Chatterjee (ETS, 2011)

Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach. - Somnath Paul; Subho Chatterjee; Saibal Mukhopadhyay; Swarup Bhunia (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective. - Subho Chatterjee; Mitchelle Rasquinha; Sudhakar Yalamanchili; Saibal Mukhopadhyay (IEEE Trans. Very Large Scale Integr. Syst., 2011)

On the parametric failures of SRAM in a 3D-die stack considering tier-to-tier supply cross-talk. - Wen Yueh; Subho Chatterjee; Amit Ranjan Trivedi; Saibal Mukhopadhyay (VTS, 2012)

A design methodology for robust, energy-efficient, application-aware memory systems. - Subho Chatterjee (2012)

Electrothermal analysis of spin-transfer-torque random access memory arrays. - Subho Chatterjee; Sayeef S. Salahuddin; Satish Kumar; Saibal Mukhopadhyay (ACM J. Emerg. Technol. Comput. Syst., 2013)

A methodology for yield-specific leakage estimation in memory. - Subho Chatterjee; Pramod Kolar; Wei Jian Chan; Jae Y. Ko; Gunjan H. Pandya (CICC, 2014)

Exploring Spin Transfer Torque Devices for Unconventional Computing. - Kaushik Roy 001; Deliang Fan; Xuanyao Fong; Yusung Kim 002; Mrigank Sharad; Somnath Paul; Subho Chatterjee; Swarup Bhunia; Saibal Mukhopadhyay (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric. - Wen Yueh; Subho Chatterjee; Muneeb Zia; Swarup Bhunia; Saibal Mukhopadhyay (IEEE Trans. Circuits Syst. II Express Briefs, 2015)