Satisfiability modulo theory based methodology for floorplanning in VLSI circuits. - Suchandra Banerjee; Anand Ratna; Suchismita Roy (ISED, 2016)

Thermal-Driven Floorplanning for Fixed Outline Layouts. - Suchandra Banerjee; Suchismita Roy (J. Circuits Syst. Comput., 2021)

Power aware floorplanning in multiple supply voltage domain. - Suchandra Banerjee; Suchismita Roy (Int. J. Circuit Theory Appl., 2022)