3D floorplanning with nets-to-TSVs assignment. - Mohammad A. Ahmed; Sucheta Mohapatra; Malgorzata Chrzanowska-Jeske (ICECS, 2014)

Dynamic nets-to-TSVs assignment in 3D floorplanning. - Mohammad A. Ahmed; Sucheta Mohapatra; Malgorzata Chrzanowska-Jeske (ISCAS, 2015)

Buffered Interconnects in 3D IC Layout Design. - Mohammad A. Ahmed; Sucheta Mohapatra; Malgorzata Chrzanowska-Jeske (SLIP, 2016)

Performance optimization and power efficiency in 3D IC with buffer insertion scheme. - Mohammad A. Ahmed; Sucheta Mohapatra; Malgorzata Chrzanowska-Jeske (SoCC, 2016)

Fast Buffer Count Estimation in 3D IC Floorplanning. - Sucheta Mohapatra; Satya K. Vendra; Malgorzata Chrzanowska-Jeske (IEEE Trans. Circuits Syst. II Express Briefs, 2021)