A 32nm 0.5V-supply dual-read 6T SRAM. - Jente B. Kuang; Jeremy D. Schaub; Fadi H. Gebara; Dieter F. Wendel; Sudesh Saroop; Tuyet Nguyen; Thomas Fröhnel; Antje Müller; Christopher M. Durham; Rolf Sautter; Bryan Lloyd; Bryan J. Robbins; et al. (CICC, 2010)

The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM. - Jente B. Kuang; Jeremy D. Schaub; Fadi H. Gebara; Dieter F. Wendel; Thomas Fröhnel; Sudesh Saroop; Sani R. Nassif; Kevin J. Nowka (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction. - Rajiv V. Joshi; Keunwoo Kim; Rouwaida Kanj; Ajay N. Bhoj; Matthew M. Ziegler; Phil Oldiges; Pranita Kerber; Robert Wong; Terence Hook; Sudesh Saroop; Carl Radens; Chun-Chen Yeh (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM. - Rajiv V. Joshi; Sudesh Saroop; Rouwaida Kanj; Yang Liu; Weike Wang; Carl Radens; Yue Tan; Karthik Yogendra (IEEE Trans. Very Large Scale Integr. Syst., 2016)

SiGe HBTs with ${f_{T}/f_{ max} , sim , 375/510GHz}$ Integrated in 45nm PDSOI CMOS. - John J. Pekarik; Vibhor Jain; Crystal Kenney; Judson Holt; Shweta Khokale; Sudesh Saroop; Jeffrey B. Johnson; Kenneth J. Stein; Viorel Ontalus; Christopher Durcan; Mona Nafari; Tayel Nesheiwat; et al. (BCICTS, 2021)

Novel mmWave NMOS Device for High Pout mmWave Power Amplifiers in 45RFSOI. - Sameer H. Jain; Dimitri Lederer; Arvind Kumar; Sudesh Saroop; Chris Prindle; P. Srinivasan 002; Wen Liu; Ravi Achanta; Erdem Kaltalioglu; Stephen Moss; Greg Freeman; Paul Colestock (ESSDERC, 2021)