Process variation aware dual-Vth assignment technique for low power nanoscale CMOS design. - Sudhakar S. Mande; Saurabh A. Chandorkar; A. N. Chandorkar (Microelectron. Reliab., 2011)

A novel approach in sar-adc for variable conversion time using window detector. - Mohd Iqbal Mohd Hadis; Sudhakar Mande (ICACCI, 2017)

12-stage FFT Implementation using cordic-based pipelined SDF Architecture. - Priya C. Mule; Sudhakar Mande (ICCCNT, 2024)

Implementation and Analysis of MAC Layer and Network Layer Protocols in 6LoWPAN Networks for Home Automation: A Comparative Study of Software and Hardware Approaches. - Aparna M. Telgote; Sudhakar S. Mande (ICCCNT, 2024)

Machine Learning Based Computationally Efficient Approach for Accurate Prediction of Power Integrity Performance of Power Distribution Networks. - Aprajita Bera; Sudhakar Mande (VDAT, 2024)

FPGA-based reduction in complexity of FFT twiddle factor butterfly with embedded CORDIC module. - Priya C. Mule; Sudhakar S. Mande (Int. J. Ad Hoc Ubiquitous Comput., 2025)

A power-awareness routing protocol for sustainable low-power wireless networks: FPGA vs. microcontroller implementation. - Aparna M. Telgote; Sudhakar S. Mande (Int. J. Ad Hoc Ubiquitous Comput., 2025)