A systematic approach to synthesis of verification test-suites for modular SoC designs. - Sudhakar Surendran; Rubin A. Parekhji; R. Govindarajan (SoCC, 2008)

The Notion of Cross Coverage in AMS Design Verification. - Sayandeep Sanyal; Aritra Hazra; Pallab Dasgupta; Scott Morrison; Sudhakar Surendran; Lakshmanan Balasubramanian (ASP-DAC, 2020)

CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs. - Sayandeep Sanyal; Aritra Hazra; Pallab Dasgupta; Scott Morrison; Sudhakar Surendran; Lakshmanan Balasubramanian (VLSID, 2020)

Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions. - Ayan Chakraborty 005; Sayandeep Sanyal; Pallab Dasgupta; Aritra Hazra; Scott Morrison; Sudhakar Surendran; Lakshmanan Balasubramanian (VLSID, 2022)

The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits. - Sayandeep Sanyal; Pallab Dasgupta; Aritra Hazra; Sourav Das; Scott Morrison; Sudhakar Surendran; Lakshmanan Balasubramanian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Analog Coverage-driven Selection of Simulation Corners for AMS Integrated Circuits. - Sayandeep Sanyal; Aritra Hazra; Pallab Dasgupta; Scott Morrison; Sudhakar Surendran; Lakshmanan Balasubramanian; Mohammad Moshiur Rahman (DATE, 2023)

MAB-BMC: A Formal Verification Enhancer by Harnessing Multiple BMC Engines Together. - Devleena Ghosh; Sumana Ghosh; Ansuman Banerjee; Raj Kumar Gajavelly; Sudhakar Surendran (ACM Trans. Design Autom. Electr. Syst., 2024)

BMC Engine Sequencing with Graph Neural Network Embeddings of Hardware Circuits. - Soumik Guha Roy; Adriz Chanda; Prateek Ganguli; Sumana Ghosh; Ansuman Banerjee; Raj Kumar Gajavelly; Sudhakar Surendran (VLSID, 2025)