Design of Self-Checking Iterative Networks. - Sudhir Dhawan; Ronald C. de Vries (IEEE Trans. Computers, 1988)

Design of Self-Checking Sequential Machines. - Sudhir Dhawan; Ronald C. de Vries (IEEE Trans. Computers, 1988)

IBM second-generation RISC machine organization. - H. B. Bakoglu; Gregory F. Grohoski; L. E. Thatcher; James A. Kahle; Charles R. Moore; David P. Tuttle; Warren E. Maule; W. R. Hardell Jr.; Dwain A. Hicks; M. Nguyenphu; Robert K. Montoye; W. T. Glover; et al. (Compcon, 1990)

The POWER2 Processor. - Jama Barreh; Sudhir Dhawan; Troy N. Hicks; David J. Shippy (COMPCON, 1994)

POWER2: Next generation of the RISC System/6000 family. - Steven W. White; Sudhir Dhawan (IBM J. Res. Dev., 1994)