VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark. - Sudip Ghosh 001; Somsubhra Talapatra; Debasish Mondal; Navonil Chatterjee; Hafizur Rahaman 001; Santi P. Maity (VDAT, 2012)

Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA. - Sudip Ghosh 001; Nachiketa Das; Subhajit Das 001; Santi P. Maity; Hafizur Rahaman 001 (ICIT, 2014)

Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA. - Sudip Ghosh 001; Arijit Biswas; Santi P. Maity; Hafizur Rahaman 001 (ISED, 2014)

An adaptive feedback based reversible watermarking algorithm using difference expansion. - Sudip Ghosh 001; Nachiketa Das; Subhajit Das 001; Santi Prasad Maity; Hafizur Rahaman 001 (ReTIS, 2015)

Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture for Real-Time Applications. - Sudip Ghosh 001; Arijit Biswas; Santi Prasad Maity; Hafizur Rahaman 001 (J. Low Power Electron., 2015)

A rule-based approach for minimizing power dissipation of digital circuits. - Subrata Das; Parthasarathi Dasgupta; Petr Fiser; Sudip Ghosh 001; Debesh Kumar Das (DDECS, 2016)

Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach. - Subhajit Das 001; Sudip Ghosh 001; Nachiketa Das; Santi P. Maity; Hafizur Rahaman 001; Reshmi Maity; Niladri Maity (Circuits Syst. Signal Process., 2018)

FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time. - Sambaran Hazra; Sudip Ghosh 001; Sayandip De; Hafizur Rahaman 001 (J. Real Time Image Process., 2018)

A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain. - Joshua Roy Palathinkal; Yuvam Bhateja; Sudip Ghosh 001; Hafizur Rahaman 001 (ISDCS, 2020)

A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation. - Shivdeep; Sudip Ghosh 001; Hafizur Rahaman 001 (ISDCS, 2020)

Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR. - Sudip Ghosh 001; Yuvam Bhateja; Joshua Roy Palathinkal; Hafizur Rahaman 001 (Circuits Syst. Signal Process., 2022)

Power and Delay Efficient Hardware Implementation with ATPG for Vedic Multiplier Using Urdhva Tiryagbhyam Sutra. - Anchit Arun; Ananya Chakraborty; Priyanka Dutta 004; Debajyoti Pal; Tridibesh Nag; Debashis De; Sudip Ghosh 001; Hafizur Rahaman 001 (IAIT, 2023)

Hardware Performance Analysis of N-bit CLA on FPGA and Programmable SoC. - Piyali Saha; Sudip Ghosh 001; Debajyoti Pal; Hafizur Rahaman 001 (IAIT, 2023)

Implementation of Area Efficient Adders for Inexact Computing. - Rounak Roy; Sudip Ghosh 001; Hafizur Rahaman 001 (ISDCS, 2023)

ML Based Diagnosis for Fault Location in Digital Circuits. - Diptanshu Bagchi; Habibur Rahaman; Sudip Ghosh 001; Subhajit Chatterjee (ATS, 2024)