Design considerations for anti-phase injected quadrature voltage controlled oscillators. - Min Chu; Sudip Shekhar; David J. Allstot; Tarun Kanti Bhattacharyya (ICECS, 2004)

Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-μm CMOS. - Xiaoyong Li 001; Sudip Shekhar; David J. Allstot (IEEE J. Solid State Circuits, 2005)

A capacitor cross-coupled common-gate low-noise amplifier. - Wei Zhuo 003; Xiaoyong Li 001; Sudip Shekhar; Sherif H. K. Embabi; José Pineda de Gyvez; David J. Allstot; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A delay generation technique for fast-locking frequency synthesizers. - Sankaran Aniruddhan; Sudip Shekhar; David J. Allstot (ISCAS, 2006)

A fully-differential CMOS Clapp VCO for IEEE 802.11a applications. - Sudip Shekhar; Sankaran Aniruddhan; David J. Allstot (ISCAS, 2006)

Bandwidth Extension Techniques for CMOS Amplifiers. - Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (IEEE J. Solid State Circuits, 2006)

Strong injection locking of low-Q LC oscillators. - Mozhgan Mansuri; Frank O'Mahony; Ganesh Balamurugan; James E. Jaussi; Joseph T. Kennedy; Sudip Shekhar; Randy Mooney; Bryan Casper (CICC, 2008)

A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. - Frank O'Mahony; Sudip Shekhar; Mozhgan Mansuri; Ganesh Balamurugan; James E. Jaussi; Joseph T. Kennedy; Bryan Casper; David J. Allstot; Randy Mooney (ISSCC, 2008)

CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits. - Sudip Shekhar; Jeffrey S. Walling; Sankaran Aniruddhan; David J. Allstot (IEEE J. Solid State Circuits, 2008)

Wideband CMOS Amplifier Design: Time-Domain Considerations. - Jeffrey S. Walling; Sudip Shekhar; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. - Sudip Shekhar; Ganesh Balamurugan; David J. Allstot; Mozhgan Mansuri; James E. Jaussi; Randy Mooney; Joseph T. Kennedy; Bryan Casper; Frank O'Mahony (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS. - Daibashish Gangopadhyay; Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (ISCAS, 2010)

U-shaped slow-wave transmission lines in 0.18μm CMOS. - Heng-Chia Hsu; Kaushik Dasgupta; Nathan M. Neihart; Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (ISCAS, 2010)

A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS. - Frank O'Mahony; Joseph T. Kennedy; James E. Jaussi; Ganesh Balamurugan; Mozhgan Mansuri; Clark Roberts; Sudip Shekhar; Randy Mooney; Bryan Casper (ISSCC, 2010)

A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS. - Frank O'Mahony; James E. Jaussi; Joseph T. Kennedy; Ganesh Balamurugan; Mozhgan Mansuri; Clark Roberts; Sudip Shekhar; Randy Mooney; Bryan Casper (IEEE J. Solid State Circuits, 2010)

A CMOS 1.6 GHz Dual-Loop PLL With Fourth-Harmonic Mixing. - Sankaran Aniruddhan; Sudip Shekhar; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise. - Sudip Shekhar; Daibashish Gangopadhyay; Eum Chan Woo; David J. Allstot (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Design considerations for low-power receiver front-end in high-speed data links. - Sudip Shekhar; James E. Jaussi; Frank O'Mahony; Mozhgan Mansuri; Bryan Casper (CICC, 2013)

A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. - Mozhgan Mansuri; James E. Jaussi; Joseph T. Kennedy; Tzu-Chien Hsueh; Sudip Shekhar; Ganesh Balamurugan; Frank O'Mahony; Clark Roberts; Randy Mooney; Bryan Casper (ISSCC, 2013)

A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. - Mozhgan Mansuri; James E. Jaussi; Joseph T. Kennedy; Tzu-Chien Hsueh; Sudip Shekhar; Ganesh Balamurugan; Frank O'Mahony; Clark Roberts; Randy Mooney; Bryan Casper (IEEE J. Solid State Circuits, 2013)

26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. - Tzu-Chien Hsueh; Ganesh Balamurugan; James E. Jaussi; Sami Hyvonen; Joseph T. Kennedy; Gökçe Keskin; Tawfiq Musah; Sudip Shekhar; Rajesh Inti; Shreyas Sen; Mozhgan Mansuri; Clark Roberts; et al. (ISSCC, 2014)

26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS. - James E. Jaussi; Ganesh Balamurugan; Sami Hyvonen; Tzu-Chien Hsueh; Tawfiq Musah; Gökçe Keskin; Sudip Shekhar; Joseph T. Kennedy; Shreyas Sen; Rajesh Inti; Mozhgan Mansuri; Michael Leddige; et al. (ISSCC, 2014)

A low-power DC-to-27-GHz transimpedance amplifier in 0.13-µm CMOS using inductive-peaking and current-reuse techniques. - Amir Hossein Masnadi Shirazi; Reza Molavi; Peter Sangpil Woo; Ge Yu; Shahriar Mirabbasi; Sudip Shekhar; André Ivanov (MWSCAS, 2014)

A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS. - Tawfiq Musah; James E. Jaussi; Ganesh Balamurugan; Sami Hyvonen; Tzu-Chien Hsueh; Gokce Keskin; Sudip Shekhar; Joseph T. Kennedy; Shreyas Sen; Rajesh Inti; Mozhgan Mansuri; Michael Leddige; et al. (IEEE J. Solid State Circuits, 2014)

A dual-tank LC VCO topology approaching towards the maximum thermodynamically-achievable oscillator FoM. - Amir Nikpaik; Abdolreza Nabavi; Amir Hossein Masnadi Shirazi; Sudip Shekhar; Shahriar Mirabbasi (CICC, 2015)

A high-performance, yet simple to design, digital-friendly type-I PLL. - Ahmad Sharkia; Sankaran Aniruddhan; Sudip Shekhar; Shahriar Mirabbasi (CICC, 2015)

A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. - Rajesh Inti; Sudip Shekhar; Ganesh Balamurugan; James E. Jaussi; Clark Roberts; Tzu-Chien Hsueh; Bryan Casper (VLSIC, 2015)

A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. - Sudip Shekhar; Rajesh Inti; James E. Jaussi; Tzu-Chien Hsueh; Bryan Casper (VLSIC, 2015)

Silicon-photonic devices: Electronic control and stabilization. - Mohammed W. AlTaha; Spoorthi Nayak; Hasitha Jayatilleka; Sudip Shekhar; Shahriar Mirabbasi (CCECE, 2016)

Enhancing transmission efficiency of broadband PLC systems with In-Band Full Duplexing. - Gautham Prasad; Lutz Lampe; Sudip Shekhar (ISPLC, 2016)

Automatic wavelength tuning of series-coupled Vernier racetrack resonators on SOI. - Hasitha Jayatilleka; Robert Boeck; Kyle Murray; Jonas Flueckiger; Lukas Chrostowski; Nicolas A. F. Jaeger; Sudip Shekhar (OFC, 2016)

On the Design of mm-Wave Self-Mixing-VCO Architecture for High Tuning-Range and Low Phase Noise. - Amir Hossein Masnadi Shirazi; Amir Nikpaik; Reza Molavi; Sam Lightbody; Hormoz Djahanshahi; Mazhareddin Taghivand; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2016)

In-Band Full Duplex Broadband Power Line Communications. - Gautham Prasad; Lutz Lampe; Sudip Shekhar (IEEE Trans. Commun., 2016)

Session 2 - Wireline techniques for advanced modulation schemes. - Sudip Shekhar; Tod Dickson (CICC, 2017)

Analog interference cancellation for full-duplex broadband power line communications. - Gautham Prasad; Lutz Lampe; Sudip Shekhar (ISPLC, 2017)

A low-power temperature sensing system for implantable biomedical applications. - Hasan Afkhami Ardakani; Amir Hossein Masnadi Shirazi; Sudip Shekhar; Shahriar Mirabbasi (NEWCAS, 2017)

Automatic tuning and temperature stabilization of high-order silicon Vernier microring filters. - Hasitha Jayatilleka; Robert Boeck; Mohammed W. AlTaha; Jonas Flueckiger; Nicolas A. F. Jaeger; Sudip Shekhar; Lukas Chrostowski (OFC, 2017)

Digitally Controlled Analog Cancellation for Full Duplex Broadband Power Line Communications. - Gautham Prasad; Lutz Lampe; Sudip Shekhar (IEEE Trans. Commun., 2017)

A 0.01mm2 4.6-to-5.6GHz sub-sampling type-I frequency synthesizer with -254dB FOM. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (ISSCC, 2018)

Compact Silicon Microring Modulator with Tunable Extinction Ratio and Wide FSR. - Hossam Shoman; Hasitha Jayatilleka; Anthony H. K. Park; Nicolas A. F. Jaeger; Sudip Shekhar; Lukas Chrostowski (OFC, 2018)

A 219-to-231 GHz Frequency-Multiplier-Based VCO With 3% Peak DC-to-RF Efficiency in 65-nm CMOS. - Amir Nikpaik; Amir Hossein Masnadi Shirazi; Abdolreza Nabavi; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2018)

A Type-I Sub-Sampling PLL With a 100×100 µm2 Footprint and -255-dB FOM. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2018)

A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter. - Abdelrahman H. Ahmed; Daihyun Lim; Abdellatif Elmoznine; Yangjin Ma; Tam N. Huynh; Christopher Williams 003; Leonardo Vera; Yang Liu 178; Ruizhi Shi; Matthew Streshinsky; Ari Novack; Ran Ding; et al. (ISSCC, 2019)

A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR. - Sudip Shekhar; Rajesh Inti; James E. Jaussi; Tzu-Chien Hsueh; Bryan Casper (IEEE J. Solid State Circuits, 2019)

An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers. - Erfan Ghaderi; Ajith Sivadhasan Ramani; Arya A. Rahimi; Deukhyoun Heo; Sudip Shekhar; Subhanshu Gupta (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $ mu$ m CMOS. - Spoorthi Nayak; Abdelrahman H. Ahmed; Ahmad Sharkia; Ajith Sivadhasan Ramani; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Differential Push-Pull Voltage Mode VCSEL Driver in 65-nm CMOS. - Ajith Sivadhasan Ramani; Spoorthi Nayak; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers. - Ahmed El Sayed; Amit Kumar Mishra; Abdelrahman H. Ahmed; Amir Hossein Masnadi Shirazi; Sang-Pil Woo; Yang-Seok Choi; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter. - Ahmad Sharkia; Sankaran Aniruddhan; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Supply-Noise-Insensitive Digitally-Controlled Oscillator. - Chen Yuan 006; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Compact Dual-Core 26.1-to-29.9GHz Coupled-CMOS LC-VCO with Implicit Common-Mode Resonance and FoM of-191 dBc/Hz at 10MHz. - Amir Hossein Masnadi Shirazi; Mohammad Mahani; Hossein Miri Lavasani; Shahriar Mirabbasi; Sudip Shekhar; Rod Zavari; Hormoz Djahanshahi (CICC, 2020)

Injection Locking in Switching Power Amplifiers. - Amit Kumar Mishra; Sankaran Aniruddhan; Sudip Shekhar (IEEE Access, 2020)

A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelength. - Abdelrahman H. Ahmed; Abdellatif Elmoznine; Daihyun Lim; Yangjin Ma; Alexander V. Rylyakov; Sudip Shekhar (IEEE J. Solid State Circuits, 2020)

On the Design of Low-Power Hybrids for Full Duplex Simultaneous Bidirectional Signaling Links. - Chen Yuan 006; Ahmed Naguib; Sudip Shekhar (IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020)

A Case for Emerging Memories in DNN Accelerators. - Avilash Mukherjee; Kumar Saurav; Prashant J. Nair; Sudip Shekhar; Mieszko Lis (DATE, 2021)

Stable Laser Without a Magneto-optic Isolator. - Hossam Shoman; Nicolas A. F. Jaeger; Connor Mosquera; Hasitha Jayatilleka; Minglei Ma; Haisheng Rong; Sudip Shekhar; Lukas Chrostowski (ECOC, 2021)

F6: Optical and Electrical Transceivers for 400GbE and Beyond. - Tony Chan Carusone; Sudip Shekhar; Yohan Frans; Wei-Zen Chen; Thomas Toifl; Munehiko Nagatani; Franz Dielacher; William Redman-White (ISSCC, 2021)

Neuromorphic Photonic Networks. - Bhavin J. Shastri; Simon Bilodeau; Bicky A. Marquez; Alexander N. Tait; Thomas Ferreira de Lima; Chaoran Huang 004; Lukas Chrostowski; Sudip Shekhar; Paul R. Prucnal (OFC, 2021)

Prospects and applications of photonic neural networks. - Chaoran Huang 004; Volker J. Sorger; Mario Miscuglio; Mohammed Al-Qadasi; Avilash Mukherjee; Sudip Shekhar; Lukas Chrostowski; Lutz Lampe; Mitchell Nichols; Mable P. Fok; Daniel Brunner; Alexander N. Tait; et al. (CoRR, 2021)

Scaling Up Silicon Photonic-based Accelerators: Challenges and Opportunities, and Roadmapping with Silicon Photonics 2.0. - Mohammed Al-Qadasi; Lukas Chrostowski; Bhavin J. Shastri; Sudip Shekhar (CoRR, 2021)

Monolithic Silicon Photonic Architecture for Training Deep Neural Networks with Direct Feedback Alignment. - Matthew J. Filipovich; Zhimu Guo; Mohammed Al-Qadasi; Bicky A. Marquez; Hugh D. Morison; Volker J. Sorger; Paul R. Prucnal; Sudip Shekhar; Bhavin J. Shastri (CoRR, 2021)

Guest Editorial Introduction to the Special Issue on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). - Vyshnavi Suntharalingam; Sudip Shekhar (IEEE J. Solid State Circuits, 2021)

Full-Duplex Wireless for (Joint-) Communication and Sensing. - Hany Abolmagd; Raghav Subbaraman; Dinesh Bharadia; Sudip Shekhar (ESSCIRC, 2022)

A 9b-Linear 14GHz Integrating-Mode Phase Interpolator in 5nm FinFET Process. - Amit Kumar Mishra; Yifei Li; Pawan Agarwal; Sudip Shekhar (ISSCC, 2022)

Optimum Conditions for Efficient Second-Harmonic Power Generation in mm-Wave Harmonic Oscillators. - Aboozar Ghorbani-Nejad; Amir Nikpaik; Abdolreza Nabavi; Amir Hossein Masnadi Shirazi; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2022)

A Transformer-Based Technique to Improve Tuning Range and Phase Noise of a 20-28GHz LCVCO and a 51-62GHz Self-Mixing LCVCO. - Omid Esmaeeli; Sam Lightbody; Amir Hossein Masnadi Shirazi; Hormoz Djahanshahi; Rod Zavari; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Photon-pair generation from two silicon micro-rings using the recycled optical power from a contra-directional pump-reject filter. - Abdelrahman E. Afifi; Andreas T. Pfenning; Sudip Shekhar; Lukas Chrostowski; Jeff F. Young (OFC, 2023)

65 GOPS/neuron Photonic Tensor Core with Thin-film Lithium Niobate Photonics. - Zhongjin Lin; Bhavin J. Shastri; Shangxuan Yu; Jingxiang Song; Yuntao Zhu; Arman Safarnejadian; Wangning Cai; Yanmei Lin; Wei Ke; Mustafa Hammood; Tianye Wang; Mengyue Xu; et al. (CoRR, 2023)

A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength. - Abdelrahman H. Ahmed; Leonardo Vera; Lorenzo Iotti; Ruizhi Shi; Sudip Shekhar; Alexander V. Rylyakov (IEEE J. Solid State Circuits, 2023)

Improving Linearity in CMOS Phase Interpolators. - Amit Kumar Mishra; Yifei Li; Pawan Agarwal; Sudip Shekhar (IEEE J. Solid State Circuits, 2023)

A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52-70-dB RF Cancellation. - Hany Abolmagd; Raghav Subbaraman; Omid Esmaeeli; Yeswanth Guntupalli; Ahmad Sharkia; Dinesh Bharadia; Sudip Shekhar (IEEE J. Solid State Circuits, 2023)

A Serrodyne Modulator-Based Fractional Frequency Synthesis Technique for Low-Noise, GHz-Rate Clocking. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2023)

Dynamic Electro-Optic Analog Memory for Neuromorphic Photonic Computing. - Sean Lam; Ahmed Khaled 005; Simon Bilodeau; Bicky A. Marquez; Paul R. Prucnal; Lukas Chrostowski; Bhavin J. Shastri; Sudip Shekhar (CoRR, 2024)

Enabling data-driven and bidirectional model development in Verilog-A for photonic devices. - Dias Azhigulov; Zeqin Lu; James Pond; Lukas Chrostowski; Sudip Shekhar (CoRR, 2024)

A 4.6-6GHz Self-Injection LC Oscillator Exploiting 2nd Harmonic Extraction and Self-Mixing to Achieve 5-35kHz 1/f3 Phase Noise Corner and 201dB FoMT. - Bahram Jafari; Sankaran Aniruddhan; Shahriar Mirabbasi; Sudip Shekhar (CICC, 2025)

A Zero-Change Isolator-Replacement Circuit in Silicon-On-Insulator Leveraging Controlled Self-Injections. - Omid Esmaeeli; Lukas Chrostowski; Sudip Shekhar (OFC, 2025)

Dynamic Beam-Stabilized, Additive-Printed Flexible Antenna Arrays with On-Chip Rapid Insight Generation. - Sreeni Poolakkal; Abdullah Islam; Arpit Rao; Shrestha Bansal; Ted Dabrowski; Kalsi Kwan; Zhongxuan Wang; Amit Kumar Mishra; Julio Navarro; Shenqiang Ren; John Williams; Sudip Shekhar; et al. (CoRR, 2025)