Sudipta Chattopadhyay

Orcid: 0000-0002-4843-5391

Affiliations:
  • Singapore University of Technology and Design (SUTD)
  • Saarland University, Computer Science Department (former)
  • Linköping University, Sweden (former)


According to our database1, Sudipta Chattopadhyay authored at least 84 papers between 2009 and 2023.

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Bibliography

2023
Boosting Adversarial Training in Safety-Critical Systems Through Boundary Data Selection.
IEEE Robotics Autom. Lett., December, 2023

VitroBench: Manipulating in-vehicle networks and COTS ECUs on your bench: A comprehensive test platform for automotive cybersecurity research.
Veh. Commun., October, 2023

Identifying threats, cybercrime and digital forensic opportunities in Smart City Infrastructure via threat modeling.
Forensic Sci. Int. Digit. Investig., June, 2023

Towards Backdoor Attacks and Defense in Robust Machine Learning Models.
Comput. Secur., April, 2023

Distribution-aware Fairness Test Generation.
CoRR, 2023

VNGuard: Intrusion Detection System for In-Vehicle Networks.
Proceedings of the Information Security - 26th International Conference, 2023

Poster: Distribution-aware Fairness Test Generation.
Proceedings of the 45th IEEE/ACM International Conference on Software Engineering: ICSE 2023 Companion Proceedings, 2023

Accented DH: Assessing Fairness of Multilingual Speech Recognition Systems.
Proceedings of the Annual International Conference of the Alliance of Digital Humanities Organizations, 2023

PAID: Perturbed Image Attacks Analysis and Intrusion Detection Mechanism for Autonomous Driving Systems.
Proceedings of the 9th ACM Cyber-Physical System Security Workshop, 2023

2022
A systematic survey of attack detection and prevention in Connected and Autonomous Vehicles.
Veh. Commun., 2022

Astraea: Grammar-Based Fairness Testing.
IEEE Trans. Software Eng., 2022

Model Agnostic Defence Against Backdoor Attacks in Machine Learning.
IEEE Trans. Reliab., 2022

Greyhound: Directed Greybox Wi-Fi Fuzzing.
IEEE Trans. Dependable Secur. Comput., 2022

Circ-Tree: A B+-Tree Variant With Circular Design for Persistent Memory.
IEEE Trans. Computers, 2022

Physical Adversarial Attack on a Robotic Arm.
IEEE Robotics Autom. Lett., 2022

Symbolic identification of shared memory based bank conflicts for GPUs.
J. Syst. Archit., 2022

BrakTooth: Causing Havoc on Bluetooth Link Manager via Directed Fuzzing.
Proceedings of the 31st USENIX Security Symposium, 2022

Repairing Adversarial Texts Through Perturbation.
Proceedings of the Theoretical Aspects of Software Engineering, 2022

ORIGAMI: Folding Data Structures to Reduce Timing Side-Channel Leakage.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Towards Automated Fuzzing of 4G/5G Protocol Implementations Over the Air.
Proceedings of the IEEE Global Communications Conference, 2022

AequeVox: Automated Fairness Testing of Speech Recognition Systems.
Proceedings of the Fundamental Approaches to Software Engineering, 2022

2021
oo7: Low-Overhead Defense Against Spectre Attacks via Program Analysis.
IEEE Trans. Software Eng., 2021

Grammar Based Directed Testing of Machine Learning Systems.
IEEE Trans. Software Eng., 2021

How to secure autonomous mobile robots? An approach with fuzzing, detection and mitigation.
J. Syst. Archit., 2021

Adversarial attacks and mitigation for anomaly detectors of cyber-physical systems.
Int. J. Crit. Infrastructure Prot., 2021

SCOPE: Secure Compiling of PLCs in Cyber-Physical Systems.
Int. J. Crit. Infrastructure Prot., 2021

2020
KLEESpectre: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution.
ACM Trans. Softw. Eng. Methodol., 2020

An Experimental Analysis of Security Vulnerabilities in Industrial IoT Devices.
ACM Trans. Internet Techn., 2020

Crab-tree: A Crash Recoverable B+-tree Variant for Persistent Memory with ARMv8 Architecture.
ACM Trans. Embed. Comput. Syst., 2020

An exploration of effective fuzzing for side-channel cache leakage.
Softw. Test. Verification Reliab., 2020

Genetic algorithm based estimation of non-functional properties for GPGPU programs.
J. Syst. Archit., 2020

Stitcher: Correlating digital forensic evidence on internet-of-things devices.
Digit. Investig., 2020

Securing Autonomous Service Robots through Fuzzing, Detection, and Mitigation.
CoRR, 2020

Exposing Backdoors in Robust Machine Learning Models.
CoRR, 2020

CIMA: Compiler-Enforced Resilience Against Memory Safety Attacks in Cyber-Physical Systems.
Comput. Secur., 2020

Systematic Classification of Attackers via Bounded Model Checking.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2020

SweynTooth: Unleashing Mayhem over Bluetooth Low Energy.
Proceedings of the 2020 USENIX Annual Technical Conference, 2020

Callisto: Entropy-based Test Generation and Data Quality Assessment for Machine Learning Systems.
Proceedings of the 13th IEEE International Conference on Software Testing, 2020

Learning Fault Models of Cyber Physical Systems.
Proceedings of the Formal Methods and Software Engineering, 2020

Isle-Tree: A B+-Tree with Intra-Cache Line Sorted Leaves for Non-volatile Memory.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Efficient and Trusted Detection of Rootkit in IoT Devices via Offline Profiling and Online Monitoring.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019
Compositional Design of Multi-Robot Systems Control Software on ROS.
ACM Trans. Embed. Comput. Syst., 2019

Quantifying the Information Leakage in Cache Attacks via Symbolic Execution.
ACM Trans. Embed. Comput. Syst., 2019

Crash recoverable ARMv8-oriented B+-tree for byte-addressable persistent memory.
Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, 2019

Road Context-Aware Intrusion Detection System for Autonomous Cars.
Proceedings of the Information and Communications Security - 21st International Conference, 2019

Cache-Aware Kernel Tiling: An Approach for System-Level Performance Optimization of GPU-Based Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Symbolic Verification of Cache Side-Channel Freedom.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Taming the War in Memory: A Resilient Mitigation Strategy Against Memory Safety Attacks in CPS.
CoRR, 2018

oo7: Low-overhead Defense against Spectre Attacks via Binary Analysis.
CoRR, 2018

Wo ist der Fehler und wie wird er behoben? Ein Experiment mit Softwareentwicklern.
Proceedings of the Software Engineering und Software Management 2018, 2018

Automated directed fairness testing.
Proceedings of the 33rd ACM/IEEE International Conference on Automated Software Engineering, 2018

Enforcing Full-Stack Memory-Safety in Cyber-Physical Systems.
Proceedings of the Engineering Secure Software and Systems - 10th International Symposium, 2018

Road context-aware intrusion detection system for autonomous cars: work-in-progress.
Proceedings of the International Conference on Embedded Software, 2018

Measurement Based Execution Time Analysis of GPGPU Programs via SE+GA.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

LAWN: boosting the performance of NVMM file system through reducing write amplification.
Proceedings of the 55th Annual Design Automation Conference, 2018

Introducing assume-guarantee contracts for verifying robotic applications: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018

2017
Directed Automated Memory Performance Testing.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2017

Where is the bug and how is it fixed? an experiment with practitioners.
Proceedings of the 2017 11th Joint Meeting on Foundations of Software Engineering, 2017

Quantifying the information leak in cache attacks via symbolic execution.
Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

Testing Cache Side-Channel Leakage.
Proceedings of the 2017 IEEE International Conference on Software Testing, 2017

How developers debug software the DbgBench dataset: poster.
Proceedings of the 39th International Conference on Software Engineering, 2017

2016
Systematic detection of memory related performance bottlenecks in GPGPU programs.
J. Syst. Archit., 2016

Quantifying the Information Leak in Cache Attacks through Symbolic Execution.
CoRR, 2016

On Testing Embedded Software.
Adv. Comput., 2016

SPARTA: A scheduling policy for thwarting differential power analysis attacks.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
MESS: Memory Performance Debugging on Embedded Multi-core Systems.
Proceedings of the Model Checking Software - 22nd International Symposium, 2015

2014
Cache-Related Preemption Delay Analysis for Multilevel Noninclusive Caches.
ACM Trans. Embed. Comput. Syst., 2014

A Unified WCET analysis framework for multicore platforms.
ACM Trans. Embed. Comput. Syst., 2014

Static analysis of multi-core TDMA resource arbitration delays.
Real Time Syst., 2014

Time-Predictable Embedded Software on Multi-Core Platforms: Analysis and Optimization.
Found. Trends Electron. Des. Autom., 2014

Detecting energy bugs and hotspots in mobile apps.
Proceedings of the 22nd ACM SIGSOFT International Symposium on Foundations of Software Engineering, (FSE-22), Hong Kong, China, November 16, 2014

Automated software testing of memory performance in embedded GPUs.
Proceedings of the 2014 International Conference on Embedded Software, 2014

2013
Scalable and precise refinement of cache timing analysis via path-sensitive verification.
Real Time Syst., 2013

Integrated Timing Analysis of Application and Operating Systems Code.
Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

Static Analysis Driven Cache Performance Testing.
Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

Precise micro-architectural modeling for WCET analysis via AI+SAT.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013

Program performance spectrum.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

2012
A Unified WCET Analysis Framework for Multi-core Platforms.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

2011
Scalable and Precise Refinement of Cache Timing Analysis via Model Checking.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011

Timing Analysis of a Protected Operating System Kernel.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011

Static bus schedule aware scratchpad allocation in multiprocessors.
Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, 2011

Bus-Aware Multicore WCET Analysis through TDMA Offset Bounds.
Proceedings of the 23rd Euromicro Conference on Real-Time Systems, 2011

2010
Modeling shared cache and bus in multi-cores for timing analysis.
Proceedings of the 13th International Workshop on Software and Compilers for Embedded Systems, 2010

2009
Unified Cache Modeling for WCET Analysis and Layout Optimizations.
Proceedings of the 30th IEEE Real-Time Systems Symposium, 2009


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