Structural analysis and regular expressions based noise elimination from web pages for web content mining. - Amit Dutta; Sudipta Paria; Tanmoy Golui; Dipak K. Kole (ICACCI, 2014)

DiSPEL: Distributed Security Policy Enforcement for Bus-based SoC. - Sudipta Paria; Swarup Bhunia (CoRR, 2023)

DIVAS: An LLM-based End-to-End Framework for SoC Security Analysis and Policy-based Protection. - Sudipta Paria; Aritra Dasgupta 002; Swarup Bhunia (CoRR, 2023)

LATENT: Leveraging Automated Test Pattern Generation for Hardware Trojan Detection. - Sudipta Paria; Pravin Gaikwad; Aritra Dasgupta 002; Swarup Bhunia (ATS, 2024)

Navigating SoC Security Landscape on LLM-Guided Paths. - Sudipta Paria; Aritra Dasgupta 002; Swarup Bhunia (ACM Great Lakes Symposium on VLSI, 2024)

DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement. - Sudipta Paria; Aritra Dasgupta 002; Swarup Bhunia (HOST, 2024)

IP Security in Structured ASIC: Challenges and Prospects. - Rasheed Almawzan; Sudipta Paria; Aritra Dasgupta 002; Kostas Amberiadis; Swarup Bhunia (ISVLSI, 2024)

Splitting the Secrets: A Cooperative Trust Model for System-on-Chip Designs with Untrusted IPs. - Aritra Dasgupta 002; Sudipta Paria; Prabuddha Chakraborty; Swarup Bhunia (ISVLSI, 2024)

VALIANT: An EDA Flow for Side-Channel Leakage Evaluation and Tailored Protection. - Rajat Sadhukhan; Sayandeep Saha; Sudipta Paria; Swarup Bhunia; Debdeep Mukhopadhyay (IEEE Trans. Computers, 2024)

SPELL: An End-to-End Tool Flow for LLM-Guided Secure SoC Design for Embedded Systems. - Sudipta Paria; Aritra Dasgupta 002; Swarup Bhunia (IEEE Embed. Syst. Lett., 2024)

CLIP: A Structural Approach to Cut Points Matching for Logic Equivalence Checking. - Dinesh Reddy Ankireddy; Sudipta Paria; Aritra Dasgupta 002; Sandip Ray; Swarup Bhunia (VTS, 2025)

Towards Automated Verification of IP and COTS: Leveraging LLMs in Pre- and Post-Silicon Stages. - Sudipta Paria; Aritra Dasgupta 002; Swarup Bhunia (VTS, 2025)

HIPR: Hardware IP Protection through Low-Overhead Fine-Grain Redaction. - Aritra Dasgupta 002; Sudipta Paria; Swarup Bhunia (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection. - Aritra Dasgupta 002; Sudipta Paria; Christopher Sozio; Andrew Lukefahr; Swarup Bhunia (CoRR, 2025)

SynFuzz: Leveraging Fuzzing of Netlist to Detect Synthesis Bugs. - Raghul Saravanan; Sudipta Paria; Aritra Dasgupta 002; Venkat Nitin Patnala; Swarup Bhunia; Sai Manoj PD (CoRR, 2025)

Enhancing Test Efficiency through Automated ATPG-Aware Lightweight Scan Instrumentation. - Sudipta Paria; Md Rezoan Ferdous; Aritra Dasgupta 002; Atri Chatterjee; Swarup Bhunia (CoRR, 2025)

LASA: Enhancing SoC Security Verification with LLM-Aided Property Generation. - Dinesh Reddy Ankireddy; Sudipta Paria; Aritra Dasgupta 002; Sandip Ray; Swarup Bhunia (CoRR, 2025)

POLARIS: Explainable Artificial Intelligence for Mitigating Power Side-Channel Leakage. - Tanzim Mahfuz; Sudipta Paria; Tasneem Suha; Swarup Bhunia; Prabuddha Chakraborty (CoRR, 2025)