Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. - Hikaru Tamura; Kiyoshi Kato; Takahiko Ishizu; Tatsuya Onuki; Wataru Uesugi; Takuro Ohmaru; Kazuaki Ohshima; Hidetomo Kobayashi; Seiichi Yoneda; Atsuo Isobe; Naoaki Tsutsui; Suguru Hondo; et al. (COOL Chips, 2014)