Low-Power High-Speed 180-nm CMOS Clock Drivers. - Tadayoshi Enomoto; Suguru Nagayama; Nobuaki Kobayashi (ASP-DAC, 2007)

Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array. - Tadayoshi Enomoto; Suguru Nagayama; Hiroaki Shikano; Yousuke Hagiwara (IEICE Trans. Electron., 2008)