Design and characterisation of 16×1 parallel outputs SPAD array in 0.18 um CMOS technology. - Suhaila Isaak; Mark C. Pitter; Steve Bull 002; Ian Harrison (APCCAS, 2010)

Design and process simulation of p-well guard ring Si Avalanche Photodiode. - Suhaila Isaak; Wan Haszerila Wan Hasan (ICCSCE, 2014)

Design of Low Power Gain-Cell eDRAM for 4Kb Memory Array in 130nm CMOS. - Shi Rong Soo; Afiq Hamzah; Nurul Ezaila Alias; Izam Kamisian; Michael Loong Peng Tan; Suhaila Isaak; Zaharah Johari (ICEEI, 2021)

DA+BMAC: Distance-Aware Bidirectional Medium Access Control for Mesh Wireless Network-on-Chip. - Mohd Shahrizal Rusli; Asrani Lit; Muhammad Nadzir Marsono; Ab Al-Hadi Ab Rahman; Shahidatul Sadiah; Michael Loong Peng Tan; Suhaila Isaak; Norlina Paraman (IEEE Access, 2025)