Design space exploration for robust power delivery in TSV based 3-D systems-on-chip. - Suhas M. Satheesh; Emre Salman (SoCC, 2012)

Power Distribution in TSV-Based 3-D Processor-Memory Stacks. - Suhas M. Satheesh; Emre Salman (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Effect of TSV fabrication technology on power distribution in 3D ICs. - Suhas M. Satheesh; Emre Salman (ACM Great Lakes Symposium on VLSI, 2013)

On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST). - Seyed Nima Mozaffari; Bonita Bhaskaran; Shantanu Sarangi; Suhas M. Satheesh; Kuo Lin Fu; Nithin Valentine; P. Manikandan; Mahmut Yilmaz (VTS, 2022)