Noise-Resilient SRAM Physically Unclonable Function Design for Security. - Sujay Pandey; Sabyasachi Deyati; Adit D. Singh; Abhijit Chatterjee (ATS, 2016)

Concurrent error detection and tolerance in Kalman filters using encoded state and statistical covariance checks. - Sujay Pandey; Suvadeep Banerjee; Abhijit Chatterjee (IOLTS, 2016)

DFM-aware fault model and ATPG for intra-cell and inter-cell defects. - Arani Sinha; Sujay Pandey; Ayush Singhal; Alodeep Sanyal; Alan Schmaltz (ITC, 2017)

ReiNN: Efficient error resilience in artificial neural networks using encoded consistency checks. - Sujay Pandey; Suvadeep Banerjee; Abhijit Chatterjee (ETS, 2018)

Cross-Layer Control Adaptation for Autonomous System Resilience. - Md Imran Momtaz; Suvadeep Banerjee; Sujay Pandey; Jacob A. Abraham; Abhijit Chatterjee (IOLTS, 2018)

Error Resilient Neuromorphic Networks Using Checker Neurons. - Sujay Pandey; Suvadeep Banerjee; Abhijit Chatterjee (IOLTS, 2018)

Characterization of Library Cells for Open-circuit Defect Exposure: A Systematic Methodology. - Sujay Pandey; Sanya Gupta; Madhu Sudhan L.; Suriya Natarajan; Arani Sinha; Abhijit Chatterjee (ITC, 2019)

SAT-ATPG Generated Multi-Pattern Scan Tests for Cell Internal Defects: Coverage Analysis for Resistive Opens and Shorts. - Sujay Pandey; Zhiwei Liao; Shreyas Nandi; Sanya Gupta; Suriyaprakash Natarajan; Arani Sinha; Adit D. Singh; Abhijit Chatterjee (ITC, 2020)

Two Pattern Timing Tests Capturing Defect-Induced Multi-Gate Delay Impact of Shorts. - Sujay Pandey; Zhiwei Liao; Shreyas Nandi; Suriyaprakash Natarajan; Arani Sinha; Adit D. Singh; Abhijit Chatterjee (VTS, 2021)

Hierarchical Test Generation for Open and Short Circuitdefect Exposure: a Systematic Methodology. - Sujay Pandey (2022)