45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme. - Suk-Soo Pyo; Cheol-Ha Lee; Gyun-Hong Kim; Kyu-Myung Choi; Young-Hyun Jun; Bai-Sun Kong (ISCAS, 2009)

A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology. - Suk-Soo Pyo; Jun-Sung Kim; Jung-Han Kim; Hyun-Taek Jung; Taejoong Song; Cheol-Ha Lee; Gyun-Hong Kim; Young-Keun Lee; Kee Sup Kim (CICC, 2012)

28-nm 1T-1MTJ 8Mb 64 I/O STT-MRAM with symmetric 3-section reference structure and cross-coupled sensing amplifier. - Artur Antonyan; Suk-Soo Pyo; Hyuntaek Jung; Gwanhyeob Koh; Taejoong Song (ISCAS, 2017)

Embedded MRAM Macro for eFlash Replacement. - Artur Antonyan; Suk-Soo Pyo; Hyuntaek Jung; Taejoong Song (ISCAS, 2018)

Reliability of Industrial grade Embedded-STT-MRAM. - Yongsung Ji; Hyunjae Goo; Jungman Lim; Tae-Young Jeong; Taiki Uemura; Gun Rae Kim; Boil Seo; Seungbae Lee; Goeun Park; Jeongmin Jo; Sang-Il Han; Kilho Lee; et al. (IRPS, 2020)

A 14.7Mb/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference. - El Mehdi Boujamaa; Samsudeen Mohamed Ali; Steve Ngueya Wandji; Alexandra Gourio; Suk-Soo Pyo; Gwanhyeob Koh; Yoonjong Song; Taejoong Song; Jongwook Kye; Jean-Christophe Vial; Andrew Sowden; Manuj Rathor; et al. (VLSI Circuits, 2020)

Algorithmic Read Resistance Trim for Improving Yield and Reducing Test Time in MRAM. - Daehyun Chang; Youngdae Kim; Suksoo Pyo; Shin Hun; Daesop Lee; Sohee Hwang; Jaesik Choi; Siwoong Kim (ITC, 2023)