Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis. - Sukanta Dey; Satyabrata Dash; Sukumar Nandi; Gaurav Trivedi (VLSID, 2017)

EvadePDF: Towards Evading Machine Learning Based PDF Malware Classifiers. - Sukanta Dey; Abhishek Kumar; Mehul Sawarkar; Pranav Kumar Singh; Sukumar Nandi (ISEA-ISAP, 2018)

PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution. - Sukanta Dey; Satyabrata Dash; Sukumar Nandi; Gaurav Trivedi (ISVLSI, 2018)

Minimizing area of VLSI power distribution networks using river formation dynamics. - Satyabrata Dash; Sukanta Dey; Deepak Joshi; Gaurav Trivedi (J. Syst. Inf. Technol., 2018)

StormOptimus: A Single Objective Constrained Optimizer Based on Brainstorming Process for VLSI Circuits. - Satyabrata Dash; Deepak Joshi; Sukanta Dey; Meenali Janveja; Gaurav Trivedi (Brain Storm Optimization Algorithms, 2019)

JSpongeGen: A Pseudo Random Generator for Low Resource Devices. - Pranav Kumar Singh; Anish V. Monsy; Rajan Garg; Sukanta Dey; Sukumar Nandi (ICDCIT, 2019)

RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic. - Satyabrata Dash; Sukanta Dey; Anish Augustine; Sankar Dhar; Jan Pidanic; Zdenek Nemec; Gaurav Trivedi (VLSID, 2019)

PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (DATE, 2020)

Energy Efficient Approach to Detect Sinkhole Attack Using Roving IDS in 6LoWPAN Network. - Pradeepkumar Bhale; Sukanta Dey; Santosh Biswas; Sukumar Nandi (I4CS, 2020)

ReFIT: Reliability Challenges and Failure Rate Mitigation Techniques for IoT Systems. - Sukanta Dey; Pradeepkumar Bhale; Sukumar Nandi (I4CS, 2020)

Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (ACM Trans. Design Autom. Electr. Syst., 2020)

PGRDP: Reliability, Delay, and Power-Aware Area Minimization of Large-Scale VLSI Power Grid Network Using Cooperative Coevolution. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (Intelligent Computing Paradigm, 2020)

Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (ISVLSI, 2021)

PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (Microprocess. Microsystems, 2021)

Secure Physical Design. - Sukanta Dey; Jungmin Park; Nitin Pundir; Dipayan Saha; Amit Mazumder Shuvo; Dhwani Mehta; Navid Asadi; Fahim Rahman; Farimah Farahmandi; Mark Tehranipoor (IACR Cryptol. ePrint Arch., 2022)