Transition analysis on FPGA for multiplier-block based FIR filter structures. - Süleyman Sirri Demirsoy; Andrew G. Dempster; Izzet Kale (ICECS, 2000)

Power analysis of multiplier blocks. - Süleyman Sirri Demirsoy; Andrew G. Dempster; Izzet Kale (ISCAS (1), 2002)

Designing multiplier blocks with low logic depth. - Andrew G. Dempster; Süleyman Sirri Demirsoy; Izzet Kale (ISCAS (5), 2002)

New Recursive DCT Implementations with Goertzel filters. - Süleyman Sirri Demirsoy; Robert Beck; Izzet Kale; Andrew G. Dempster (Int. J. Comput., 2002)

Reconfigurable implementation of recursive DCT kernels for reduced quantization noise. - Süleyman Sirri Demirsoy; Robert Beck; Andrew G. Dempster; Izzet Kale (ISCAS (4), 2003)

Design guidelines for reconfigurable multiplier blocks. - Süleyman Sirri Demirsoy; Andrew G. Dempster; Izzet Kale (ISCAS (4), 2003)

Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers. - Ediz Çetin; Süleyman Sirri Demirsoy; Izzet Kale; Richard C. S. Morling (EUSIPCO, 2005)

Synthesis of reconfigurable multiplier blocks: part I - fundamentals. - Süleyman Sirri Demirsoy; Izzet Kale; Andrew G. Dempster (ISCAS (1), 2005)

Synthesis of reconfigurable multiplier blocks: part - II algorithm. - Süleyman Sirri Demirsoy; Izzet Kale; Andrew G. Dempster (ISCAS (1), 2005)

A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver. - Ediz Çetin; Süleyman Sirri Demirsoy; Izzet Kale; Richard C. S. Morling (AHS, 2006)

A computationally efficient DAB bit-stream processor. - Renan Kazazoglu; Süleyman Sirri Demirsoy; Izzet Kale; Richard C. S. Morling (ISCAS, 2006)

Session MA5: Programmable and reconfigurable architectures. - Süleyman Sirri Demirsoy (ACSCC, 2008)

Cholesky decomposition using fused datapath synthesis. - Süleyman Sirri Demirsoy; Martin Langhammer (FPGA, 2009)

SoC framework for FPGA: A case study of LTE PUSCH receiver. - Süleyman Sirri Demirsoy; Kellie Marks (SoCC, 2009)

Fast & Strong: The Case of Compressed String Dictionaries on Modern CPUs. - Robert Lasch; Ismail Oukid; Roman Dementiev; Norman May; Süleyman Sirri Demirsoy; Kai-Uwe Sattler (DaMoN, 2019)

Accelerating re-pair compression using FPGAs. - Robert Lasch; Süleyman Sirri Demirsoy; Norman May; Veeraraghavan Ramamurthy; Christian Färber; Kai-Uwe Sattler (DaMoN, 2020)

Faster & strong: string dictionary compression using sampling and fast vectorized decompression. - Robert Lasch; Ismail Oukid; Roman Dementiev; Norman May; Süleyman Sirri Demirsoy; Kai-Uwe Sattler (VLDB J., 2020)

Bandwidth-optimal Relational Joins on FPGAs. - Robert Lasch; Mehdi Moghaddamfar; Norman May; Süleyman Sirri Demirsoy; Christian Färber; Kai-Uwe Sattler (EDBT, 2022)

DASH: Asynchronous Hardware Data Processing Services. - Norman May; Daniel Ritter 001; Andre Dossinger; Christian Faerber; Süleyman Sirri Demirsoy (CIDR, 2023)

Accelerating In-memory Database Functionality with FPGAs. - Jordan Leggett; John McGlone; Süleyman Sirri Demirsoy; Christian Faerber; Vadim Pelyushenko (ACM Trans. Reconfigurable Technol. Syst., 2025)