A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques. - Gordon Gammie; Alice Wang; Minh Chau; Sumanth Gururajarao; Robert Pitts; Fabien Jumel; Stacey Engel; Philippe Royannez; Rolf Lagerquist; Hugh Mair; Jeff Vaccani; Greg Baldwin; et al. (ISSCC, 2008)

SmartReflex Power and Performance Management Technologies for 90 nm, 65 nm, and 45 nm Mobile Application Processors. - Gordon Gammie; Alice Wang; Hugh Mair; Rolf Lagerquist; Minh Chau; Philippe Royannez; Sumanth Gururajarao; Uming Ko (Proc. IEEE, 2010)

23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques. - Hugh Mair; Gordon Gammie; Alice Wang; Sumanth Gururajarao; Ichiro Lin; HsinChen Chen; Wuan Kuo; Anand Rajagopalan; Wei-Zheng Ge; Rolf Lagerquist; Syed Rahman; C. J. Chung; et al. (ISSCC, 2015)

4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)

2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC. - Anshul Varma; Sumanth Gururajarao; HsinChen Chen; Tao Chen; Gordon Gammie; Hugh Mair; Jen-Hang Yang; Hao-Hsiang Yu; Shun-Chieh Chang; Cheng-Hao Yang; Li-An Huang; Kumar Ramanathan; et al. (ISSCC, 2024)