High Speed and Memory Efficient Parallel Bit Plane Coding Architecture for JPEG2000. - Tenugu Suman; Sumit Kumar Chatterjee; Indrajit Chakrabarti (ICVGIP, 2008)

Low power VLSI architectures for one bit transformation based fast motion estimation. - Sumit Kumar Chatterjee; Indrajit Chakrabarti (IEEE Trans. Consumer Electron., 2010)

Power efficient motion estimation algorithm and architecture based on pixel truncation. - Sumit Kumar Chatterjee; Indrajit Chakrabarti (IEEE Trans. Consumer Electron., 2011)

Implementation of weighted constrained one-bit transformation based fast motion estimation. - Sumit Kumar Chatterjee (IEEE Trans. Consumer Electron., 2012)

Algorithm and architecture for quarter pixel motion estimation for H.264/AVC. - Sumit Kumar Chatterjee; Indrajit Chakrabarti (NCVPRIPG, 2013)

Motion Estimation for Video Coding - Efficient Algorithms and Architectures - Indrajit Chakrabarti; Kota Naga Srinivasarao Batta; Sumit Kumar Chatterjee (Springer, 2015)

FPGA implementation of EFSME for high efficient video coding standard. - Sumit Kumar Chatterjee; Sravan Kumar Vittapu (Multim. Tools Appl., 2022)