Diffusion break-aware leakage power optimization and detailed placement in sub-10nm VLSI. - Sun ik Heo; Andrew B. Kahng; Minsoo Kim; Lutong Wang (ASP-DAC, 2019)

Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI. - Sun ik Heo; Andrew B. Kahng; Minsoo Kim; Lutong Wang; Chutong Yang (DATE, 2019)