Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA. - Jun Yeon Won; Sun Il Kwon; Hyun Suk Yoon; Guen Bae Ko; Jeong-Whan Son; Jae Sung Lee (IEEE Trans. Biomed. Circuits Syst., 2016)