Reliable computing with ultra-reduced instruction set co-processors. - Aravindkumar Rajendiran; Sundaram Ananthanarayanan; Hiren D. Patel; Mahesh V. Tripunitara; Siddharth Garg (DAC, 2012)

EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). - Sundaram Ananthanarayanan; Chirag Ravishankar; Siddharth Garg; Andrew A. Kennings (FPGA, 2012)

EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip. - Chirag Ravishankar; Sundaram Ananthanarayanan; Siddharth Garg; Andrew A. Kennings (FPL, 2012)

Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms. - Chirag Ravishankar; Sundaram Ananthanarayanan; Siddharth Garg; Andrew A. Kennings (ISQED, 2012)

Low cost permanent fault detection using ultra-reduced instruction set co-processors. - Sundaram Ananthanarayanan; Siddharth Garg; Hiren D. Patel (DATE, 2013)

Reliable Computing with Ultra-Reduced Instruction Set Coprocessors. - Dan Wang; Aravindkumar Rajendiran; Sundaram Ananthanarayanan; Hiren D. Patel; Mahesh V. Tripunitara; Siddharth Garg (IEEE Micro, 2014)

Deep Speech 2 : End-to-End Speech Recognition in English and Mandarin. - Dario Amodei; Sundaram Ananthanarayanan; Rishita Anubhai; Jingliang Bai; Eric Battenberg; Carl Case; Jared Casper; Bryan Catanzaro; Jingdong Chen; Mike Chrzanowski; Adam Coates 002; Greg Diamos; et al. (ICML, 2016)

Keeping Master Green at Scale. - Sundaram Ananthanarayanan; Masoud Saeida Ardekani; Denis Haenikel; Balaji Varadarajan; Simon Soriano; Dhaval Patel; Ali-Reza Adl-Tabatabai (EuroSys, 2019)