A 500-MHz-1.25-GHz fast-locking pulsewidth control loop with presettable duty cycle. - Sung-Rung Han; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2004)

A single-path pulsewidth control loop with a built-in delay-locked loop. - Sung-Rung Han; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2005)

A Time-Constant Calibrated Phase-Locked Loop With a Fast-Locked Time. - Sung-Rung Han; Chi-Nan Chuang; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2007)