TASSER: A temperature-aware statistical soft-error-rate analysis framework for combinational circuits. - Sung S.-Y. Hsueh; Ryan H.-M. Huang; Charles H.-P. Wen (ISQED, 2014)

35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC. - Bo-Jr Huang; Eric Jia-Wei Fang; Sung S.-Y. Hsueh; Rory Huang; Angus Lin; Chi-Hsun Chiang; Yi-Hsuan Lin; Wen-Wen Hsieh; Barry Chen; Yi-Chang Zhuang; Cheng-Yuh Wu; Jia-Ming Chen; et al. (ISSCC, 2021)

Minimum Operating Voltage Prediction in Production Test Using Accumulative Learning. - Yen-Ting Kuo; Wei-Chen Lin; Chun Chen; Chao-Ho Hsieh; James Chien-Mo Li; Eric Jia-Wei Fang; Sung S.-Y. Hsueh (ITC, 2021)

Chip Performance Prediction Using Machine Learning Techniques. - Min-Yan Su; Wei-Chen Lin; Yen-Ting Kuo; Chien-Mo James Li; Eric Jia-Wei Fang; Sung S.-Y. Hsueh (VLSI-DAT, 2021)

ML-Assisted VminBinning with Multiple Guard Bands for Low Power Consumption. - Wei-Chen Lin; Chun Chen; Chao-Ho Hsieh; James Chien-Mo Li; Eric Jia-Wei Fang; Sung S.-Y. Hsueh (ITC, 2022)

A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET. - Bo-Jr Huang; Alfred Tsai; Lear Hsieh; Kathleen Chang; C.-J. Tsai; Jia-Ming Chen; Eric Jia-Wei Fang; Sung S.-Y. Hsueh; Jack Ciao; Barry Chen; Chuck Chang; Ping Kao; et al. (ISSCC, 2023)

2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC. - Anshul Varma; Sumanth Gururajarao; HsinChen Chen; Tao Chen; Gordon Gammie; Hugh Mair; Jen-Hang Yang; Hao-Hsiang Yu; Shun-Chieh Chang; Cheng-Hao Yang; Li-An Huang; Kumar Ramanathan; et al. (ISSCC, 2024)