AC-JTAG: empowering JTAG beyond testing DC nets. - Sung Soo Chung; Sanghyeon Baeg (ITC, 2001)

An effort-minimized logic BIST implementation method. - Xinli Gu; Sung Soo Chung; Frank Tsang; Jan Arild Tofte; Hamid Rahmanian (ITC, 2001)

Re-Using DFT Logic for Functional and Silicon Debugging Test. - Xinli Gu; Weili Wang; Kevin Li; Heon C. Kim; Sung Soo Chung (ITC, 2002)

Removing JTAG Bottlenecks in System Interconnect Test. - Hong Shin Jun; Sung Soo Chung; Sang H. Baeg (ITC, 2004)

At-Speed Interconnect Test and Diagnosis of External Memories on a System. - Heon C. Kim; Hong Shin Jun; Xinli Gu; Sung Soo Chung (ITC, 2004)

Analytical test buffer design for differential signaling I/O buffers by error syndrome analysis. - Sanghyeon Baeg; Sung Soo Chung (IEEE Trans. Very Large Scale Integr. Syst., 2005)