Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic. - Sunmean Kim; Sung-Yun Lee; Sunghye Park; Seokhyeong Kang (ISMVL, 2019)

Multi-Threshold Voltages Graphene Barristor-Based Ternary ALU. - Sunghye Park; Sunmean Kim; Seokhyeong Kang (ISOCC, 2019)

A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits. - Sunmean Kim; Sung-Yun Lee; Sunghye Park; Kyung Rok Kim; Seokhyeong Kang (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A fast and scalable qubit-mapping method for noisy intermediate-scale quantum computers. - Sunghye Park; Daeyeon Kim; Minhyuk Kweon; Jae-Yoon Sim; Seokhyeong Kang (DAC, 2022)

MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device. - Sunghye Park; Dohun Kim; Jae-Yoon Sim; Seokhyeong Kang (ICCAD, 2022)

ClusterNet: Routing Congestion Prediction and Optimization Using Netlist Clustering and Graph Neural Networks. - Kyungjun Min; Seongbin Kwon; Sung-Yun Lee; Dohun Kim; Sunghye Park; Seokhyeong Kang (ICCAD, 2023)

Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. - Ludwig Schmid; Sunghye Park; Seokhyeong Kang; Robert Wille (CoRR, 2023)

HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code Communication. - Sunghye Park; Dohun Kim; Seokhyeong Kang (DAC, 2024)

Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. - Ludwig Schmid; Sunghye Park; Robert Wille (DAC, 2024)

QNSA: Quantum Neural Simulated Annealing for Combinatorial Optimization. - Seongbin Kwon; Dohun Kim; Sunghye Park; Seojeong Kim; Seokhyeong Kang (ISQED, 2024)

Neural Circuit Parameter Prediction for Efficient Quantum Data Loading. - Dohun Kim; Sunghye Park; Seokhyeong Kang (DATE, 2025)