A Correlated Diffusion Noise Model for the Field-Effect Transistor. - Sungjae Lee 005; Kevin J. Webb (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Gate stack resistance and limits to CMOS logic performance. - Richard A. Wachnik; Sungjae Lee 005; Li-Hong Pan; Ning Lu; Hongmei Li; Raphael Bingert; Mai Randall; Scott K. Springer; Christopher S. Putnam (CICC, 2013)

Virtual de-embedding study for the accurate extraction of Fin FET gate resistance. - Shireen Warnock; Robert A. Groves; Hongmei Li; Richard A. Wachnik; Pooja M. Kotecha; Sungjae Lee 005; Ning Lu; Paul Solomon; Keith Jenkins (CICC, 2014)

Gate Stack Resistance and Limits to CMOS Logic Performance. - Richard A. Wachnik; Sungjae Lee 005; Li-Hong Pan; Hongmei Li; Ning Lu; Jing Wang; Christophe Bernicot; Raphael Bingert; Mai Randall; Scott K. Springer; Christopher S. Putnam (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Symmetry breaking in the drain current of multi-finger transistors. - Ning Lu; Sungjae Lee 005; Richard A. Wachnik (CICC, 2015)

A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS. - Jonathan E. Proesel; Zeynep Toprak Deniz; Alessandro Cevrero; Ilter Özkaya; Seongwon Kim; Daniel M. Kuchta; Sungjae Lee 005; Sergey V. Rylov; Herschel A. Ainspan; Timothy O. Dickson; John F. Bulzacchelli; Mounir Meghelli (IEEE J. Solid State Circuits, 2018)