Hardware-Software Codesign of Resource-Constrained Real-Time Systems. - Sungjoo Yoo; Jinhwan Jeon; Seongsoo Hong; Kiyoung Choi (RTCSA, 1996)

Optimistic distributed timed cosimulation based on thread simulation model. - Sungjoo Yoo; Kiyoung Choi (CODES, 1998)

Optimizing geographically distributed timed cosimulation by hierarchically grouped messages. - Sungjoo Yoo; Kiyoung Choi (CODES, 1999)

Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design. - Byungil Jeong; Sungjoo Yoo; Kiyoung Choi (FPGA, 1999)

Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs. - Byungil Jeong; Sungjoo Yoo; Sunghyun Lee; Kiyoung Choi (ASP-DAC, 2000)

Performance estimation of multiple-cache IP-based systems: case study of an interdependency problem and application of an extended shared memory model. - Sungjoo Yoo; Kyoungseok Rha; Youngchul Cho; Jinyong Jung; Kiyoung Choi (CODES, 2000)

Fast Hardware-Software Coverification by Optimistic Execution of Real Processor. - Sungjoo Yoo; Jong-eun Lee; Jinyong Jung; Kyungseok Rha; Youngchul Cho; Kiyoung Choi (DATE, 2000)

Optimizing Timed Cosimulation by Hybrid Synchronization. - Sungjoo Yoo; Kiyoung Choi (Des. Autom. Embed. Syst., 2000)

Performance improvement of geographically distributed cosimulation by hierarchically grouped messages. - Sungjoo Yoo; Kiyoung Choi; Dong Sam Ha (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. - Patrice Gerin; Sungjoo Yoo; Gabriela Nicolescu; Ahmed Amine Jerraya (ASP-DAC, 2001)

A generic wrapper architecture for multi-processor SoC cosimulation and design. - Sungjoo Yoo; Gabriela Nicolescu; Damien Lyonnard; Amer Baghdadi; Ahmed Amine Jerraya (CODES, 2001)

Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. - Damien Lyonnard; Sungjoo Yoo; Amer Baghdadi; Ahmed Amine Jerraya (DAC, 2001)

Automatic generation and targeting of application specific operating systems and embedded systems software. - Lovic Gauthier; Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2001)

Performance improvement of multi-processor systems cosimulation based on SW analysis. - Jinyong Jung; Sungjoo Yoo; Kiyoung Choi (DATE, 2001)

Mixed-level cosimulation for fine gradual refinement of communication in SoC design. - Gabriela Nicolescu; Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2001)

Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication. - Sungjoo Yoo; Gabriela Nicolescu; Lovic Gauthier; Ahmed Amine Jerraya (HLDVT, 2001)

Automatic generation and targeting of application-specificoperating systems and embedded systems software. - Lovic Gauthier; Sungjoo Yoo; Ahmed Amine Jerraya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Reconfigurable SoC design with hierarchical FSM and synchronous dataflow model. - Sunghyun Lee; Sungjoo Yoo; Kiyoung Choi (CODES, 2002)

Component-based design approach for multicore SoCs. - Wander O. Cesário; Amer Baghdadi; Lovic Gauthier; Damien Lyonnard; Gabriela Nicolescu; Yanick Paviot; Sungjoo Yoo; Ahmed Amine Jerraya; Mario Diaz-Nava (DAC, 2002)

Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. - Sungjoo Yoo; Gabriela Nicolescu; Lovic Gauthier; Ahmed Amine Jerraya (DATE, 2002)

Timed HW-SW cosimulation using native execution of OS and application SW. - Iuliana Bacivarov; Sungjoo Yoo; Ahmed Amine Jerraya (HLDVT, 2002)

An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model. - Sunghyun Lee; Kiyoung Choi; Sungjoo Yoo (ISLPED, 2002)

Validation in a Component-Based Design Flow for Multicore SoCs. - Ahmed Amine Jerraya; Sungjoo Yoo; Aimen Bouchhima; Gabriela Nicolescu (ISSS, 2002)

Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. - Gabriela Nicolescu; S. Martinez; Lobna Kriaa; Wassim Youssef; Sungjoo Yoo; Benoît Charlot; Ahmed Amine Jerraya (ASP-DAC/VLSI Design, 2002)

Multiprocessor SoC Platforms: A Component-Based Design Approach. - Wander O. Cesário; Damien Lyonnard; Gabriela Nicolescu; Yanick Paviot; Sungjoo Yoo; Ahmed Amine Jerraya; Lovic Gauthier; Mario Diaz-Nava (IEEE Des. Test Comput., 2002)

Desiderata pour la spécification et la conception des systèmes électroniques. - Gabriela Nicolescu; Kjetil Svarstad; Wander O. Cesário; Lovic Gauthier; Damien Lyonnard; Sungjoo Yoo; Philippe Coste; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2002)

Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. - Youngchul Cho; Ganghee Lee; Kiyoung Choi; Sungjoo Yoo; Nacer-Eddine Zergainoh (Embedded Software for SoC, 2003)

Introduction to Hardware Abstraction Layers for SoC. - Sungjoo Yoo; Ahmed Amine Jerraya (Embedded Software for SoC, 2003)

Multi-Level Software Validation for NoC. - Sungjoo Yoo; Gabriela Nicolescu; Iuliana Bacivarov; Wassim Youssef; Aimen Bouchhima; Ahmed Amine Jerraya (Networks on Chip, 2003)

Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. - Youngchul Cho; Ganghee Lee; Sungjoo Yoo; Kiyoung Choi; Nacer-Eddine Zergainoh (DATE, 2003)

Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. - Sungjoo Yoo; Iuliana Bacivarov; Aimen Bouchhima; Yanick Paviot; Ahmed Amine Jerraya (DATE, 2003)

Introduction to Hardware Abstraction Layers for SoC. - Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2003)

An Efficient Simulation Environment and Simulation Techniques for Bluetooth Device Design. - Yongjin Ahn; Daehong Kim; Sunghyun Lee; Sanggyu Park; Sungjoo Yoo; Kiyoung Choi; Soo-Ik Chae (Des. Autom. Embed. Syst., 2003)

Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. - Aimen Bouchhima; Sungjoo Yoo; Ahmed Amine Jerraya (ASP-DAC, 2004)

Debugging HW/SW interface for MPSoC: video encoder system design case study. - Mohamed-Wassim Youssef; Sungjoo Yoo; Arif Sasongko; Yanick Paviot; Ahmed Amine Jerraya (DAC, 2004)

Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software. - Sungjoo Yoo; Mohamed-Wassim Youssef; Aimen Bouchhima; Ahmed Amine Jerraya; Mario Diaz-Nava (DATE, 2004)

Scheduler implementation in MP SoC design. - Youngchul Cho; Sungjoo Yoo; Kiyoung Choi; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya (ASP-DAC, 2005)

ChronoSym: a new approach for fast and accurate SoC cosimulation. - Iuliana Bacivarov; Aimen Bouchhima; Sungjoo Yoo; Ahmed Amine Jerraya (Int. J. Embed. Syst., 2005)

PowerViP: Soc power estimation framework at transaction level. - Ikhwan Lee; Hyunsuk Kim; Peng Yang; Sungjoo Yoo; Eui-Young Chung; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (ASP-DAC, 2006)

Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. - Sungpack Hong; Sungjoo Yoo; Sheayun Lee; Sangwoo Lee; Hye Jeong Nam; Bum-Seok Yoo; Jaehyung Hwang; Donghyun Song; Janghwan Kim; Jeongeun Kim; HoonSang Jin; Kyu-Myung Choi; et al. (CODES+ISSS, 2006)

Runtime distribution-aware dynamic voltage scaling. - Sungpack Hong; Sungjoo Yoo; HoonSang Jin; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (ICCAD, 2006)

Communication Architecture Synthesis of Cascaded Bus Matrix. - Jun-hee Yoo; Dongwook Lee; Sungjoo Yoo; Kiyoung Choi (ASP-DAC, 2007)

Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip. - Youngchul Cho; Nacer-Eddine Zergainoh; Sungjoo Yoo; Ahmed Amine Jerraya; Kiyoung Choi (Des. Autom. Embed. Syst., 2007)

Fast cycle-approximate MPSoC simulation based on synchronization time-point prediction. - Jinyong Jung; Sungjoo Yoo; Kiyoung Choi (Des. Autom. Embed. Syst., 2007)

An industrial perspective of power-aware reliable SoC design. - Soo-Kwan Eo; Sungjoo Yoo; Kyu-Myung Choi (ASP-DAC, 2008)

Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches. - Minje Jun; Sungjoo Yoo; Eui-Young Chung (ASP-DAC, 2008)

A practical approach of memory access parallelization to exploit multiple off-chip DDR memories. - Woo-Cheol Kwon; Sungjoo Yoo; Sung-Min Hong; Byeong Min; Kyu-Myung Choi; Soo-Kwan Eo (DAC, 2008)

Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution. - Sungpack Hong; Sungjoo Yoo; Byeong Bin; Kyu-Myung Choi; Soo-Kwan Eo; Taehwan Kim 007 (DATE, 2008)

An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication. - Woo-Cheol Kwon; Sung-Min Hong; Sungjoo Yoo; Byeong Min; Kyu-Myung Choi; Soo-Kwan Eo (DATE, 2008)

Entry control in network-on-chip for memory power reduction. - Dongwook Lee; Sungjoo Yoo; Kiyoung Choi (ISLPED, 2008)

Multiprocessor System-on-Chip designs with active memory processors for higher memory efficiency. - Jun-hee Yoo; Sungjoo Yoo; Kiyoung Choi (DAC, 2009)

Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling. - Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (DATE, 2009)

In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem. - Woo-Cheol Kwon; Sungjoo Yoo; Junhyung Um; Seh-Woong Jeong (DATE, 2009)

Power Modeling of Solid State Disk for Dynamic Power Management Policy Design in Embedded Systems. - Jinha Park; Sungjoo Yoo; Sunggu Lee; Chanik Park (SEUS, 2009)

Topology Synthesis of Cascaded Crossbar Switches. - Minje Jun; Sungjoo Yoo; Eui-Young Chung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution. - Jungsoo Kim; Seungyong Oh; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Topology/Floorplan/Pipeline Co-Design of Cascaded Crossbar Bus. - Jun-hee Yoo; Sungjoo Yoo; Kiyoung Choi (IEEE Trans. Very Large Scale Integr. Syst., 2009)

An analytical dynamic scaling of supply voltage and body bias exploiting memory stall time variation. - Jungsoo Kim; Younghoon Lee; Sungjoo Yoo; Chong-Min Kyung (ASP-DAC, 2010)

Event statistics and criticality-aware bitrate allocation to minimize energy consumption of memory-constrained wireless surveillance system. - Jungsoo Kim; Jaemoon Kim; Giwon Kim; Sangkwon Na; Sungjoo Yoo; Chong-Min Kyung (ICME, 2010)

A Network Congestion-Aware Memory Controller. - Dongki Kim; Sungjoo Yoo; Sunggu Lee (NOCS, 2010)

Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution. - Kyungsu Kang; Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Dual Motion Estimation for Frame Rate Up-Conversion. - Suk-Ju Kang; Sungjoo Yoo; Young Hwan Kim (IEEE Trans. Circuits Syst. Video Technol., 2010)

Matching cache access behavior and bit error pattern for high performance low Vcc L1 cache. - Young-Geun Choi; Sungjoo Yoo; Sunggu Lee; Jung Ho Ahn (DAC, 2011)

FlexiBuffer: reducing leakage power in on-chip network routers. - Gwangsun Kim; John Kim 001; Sungjoo Yoo (DAC, 2011)

Power management of hybrid DRAM/PRAM-based main memory. - Hyunsun Park; Sungjoo Yoo; Sunggu Lee (DAC, 2011)

A quantitative analysis of performance benefits of 3D die stacking on mobile and embedded SoC. - Dongki Kim; Sungjoo Yoo; Sunggu Lee; Jung Ho Ahn; Hyunuk Jung (DATE, 2011)

A novel tag access scheme for low power L2 cache. - Hyunsun Park; Sungjoo Yoo; Sunggu Lee (DATE, 2011)

Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory. - Kyungsu Kang; Jongpil Jung; Sungjoo Yoo; Chong-Min Kyung (ISQED, 2011)

Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints. - Kyungsu Kang; Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Program Phase-Aware Dynamic Voltage Scaling Under Variable Computational Workload and Memory Stall Environment. - Jungsoo Kim; Sungjoo Yoo; Chong-Min Kyung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU. - Dongki Kim; Sungkwang Lee; Jaewoong Chung; Daehyun Kim 001; Dong Hyuk Woo; Sungjoo Yoo; Sunggu Lee (DAC, 2012)

Write performance improvement by hiding R drift latency in phase-change RAM. - Youngsik Kim; Sungjoo Yoo; Sunggu Lee (DAC, 2012)

A case study on the application of real phase-change RAM to main memory subsystem. - Suknam Kwon; Dongki Kim; Youngsik Kim; Sungjoo Yoo; Sunggu Lee (DATE, 2012)

Bloom filter-based dynamic wear leveling for phase-change RAM. - Joosung Yun; Sunggu Lee; Sungjoo Yoo (DATE, 2012)

Optimal wake-up scheduling of data gathering trees for wireless sensor networks. - Ungjin Jang; Sunggu Lee; Sungjoo Yoo (J. Parallel Distributed Comput., 2012)

Active Memory Processor for Network-on-Chip-Based Architecture. - Jun-hee Yoo; Sungjoo Yoo; Kiyoung Choi (IEEE Trans. Computers, 2012)

A Multistep Tag Comparison Method for a Low-Power L2 Cache. - Hyunsun Park; Sungjoo Yoo; Sunggu Lee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Optimizing Video Application Design for Phase-Change RAM-Based Main Memory. - Suknam Kwon; Sungjoo Yoo; Sunggu Lee; Jinpyo Park (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Selectively protecting error-correcting code for area-efficient and reliable STT-RAM caches. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (ASP-DAC, 2013)

Multi-histogram based scene change detection for frame rate up-conversion. - Suk-Ju Kang; Sung In Cho; Sungjoo Yoo; Young Hwan Kim (ICCE, 2013)

Write intensity prediction for energy-efficient non-volatile caches. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (ISLPED, 2013)

A network congestion-aware memory subsystem for manycore. - Dongki Kim; Sungjoo Yoo; Sunggu Lee (ACM Trans. Embed. Comput. Syst., 2013)

MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache. - Young-Geun Choi; Sungjoo Yoo; Sunggu Lee; Jung Ho Ahn; Kangmin Lee (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (DAC, 2014)

Coarse-grained Bubble Razor to exploit the potential of two-phase transparent latch designs. - Hayoung Kim; Dongyoung Kim; Jae-Joon Kim; Sungjoo Yoo; Sunggu Lee (DATE, 2014)

Accelerating graph computation with racetrack memory and pointer-assisted graph representation. - Eunhyuk Park; Sungjoo Yoo; Sunggu Lee; Hai Helen Li (DATE, 2014)

DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (HPCA, 2014)

FPGA-based prototyping systems for emerging memory technologies. - Taemin Lee; Dongki Kim; Hyunsun Park; Sungjoo Yoo; Sunggu Lee (RSP, 2014)

An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices. - Sang-Hoon Park; Dong-gun Kim; Kwanhu Bang; Hyuk-Jun Lee; Sungjoo Yoo; Eui-Young Chung (IEEE Trans. Computers, 2014)

A Memory-Efficient Architecture of Full HD Around View Monitor Systems. - Byeongchan Jeon; Gyuro Park; Junseok Lee; Sungjoo Yoo; Hong Jeong (IEEE Trans. Intell. Transp. Syst., 2014)

Big/little deep neural network for ultra low power inference. - Eunhyeok Park; Dongyoung Kim; Soobeom Kim; Yong-Deok Kim; Gunhee Kim; Sungroh Yoon; Sungjoo Yoo (CODES+ISSS, 2015)

A tiny-capacitor-backed non-volatile buffer to reduce storage writes in smartphones. - Mungyu Son; Junwhan Ahn; Sungjoo Yoo (CODES+ISSS, 2015)

Memory fast-forward: a low cost special function unit to enhance energy efficiency in GPU for big data processing. - Eunhyeok Park; Junwhan Ahn; Sungpack Hong; Sungjoo Yoo; Sunggu Lee (DATE, 2015)

A small non-volatile write buffer to reduce storage writes in smartphones. - Mungyu Son; Sungkwang Lee; Kyungho Kim; Sungjoo Yoo; Sunggu Lee (DATE, 2015)

A scalable processing-in-memory accelerator for parallel graph processing. - Junwhan Ahn; Sungpack Hong; Sungjoo Yoo; Onur Mutlu; Kiyoung Choi (ISCA, 2015)

PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture. - Junwhan Ahn; Sungjoo Yoo; Onur Mutlu; Kiyoung Choi (ISCA, 2015)

Locality-aware vertex scheduling for GPU-based graph computation. - Hyunsun Park; Junwhan Ahn; Eunhyeok Park; Sungjoo Yoo (VLSI-SoC, 2015)

Filtering dirty data in DRAM to reduce PRAM writes. - Hyunsun Park; Chanha Kim; Sungjoo Yoo; Chanik Park (VLSI-SoC, 2015)

Time slot assignment for convergecast in wireless sensor networks. - Junyoung Park; Sunggu Lee; Sungjoo Yoo (J. Parallel Distributed Comput., 2015)

Extending lifetime of flash memory using strong error correction coding. - Chanha Kim; Chanik Park; Sungjoo Yoo; Sunggu Lee (IEEE Trans. Consumer Electron., 2015)

Hybrid Main Memory for High Bandwidth Multi-Core System. - Dongki Kim; Sungjoo Yoo; Sunggu Lee (IEEE Trans. Multi Scale Comput. Syst., 2015)

Dynamic Wear Leveling for Phase-Change Memories With Endurance Variations. - Joosung Yun; Sunggu Lee; Sungjoo Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Area-efficient one-cycle correction scheme for timing errors in flip-flop based pipelines. - Jongeun Koo; Eunwoo Song; Eunhyeok Park; Dongyoung Kim; Junki Park; Sungju Ryu; Sungjoo Yoo; Jae-Joon Kim (A-SSCC, 2016)

Zero and data reuse-aware fast convolution for deep neural networks on GPU. - Hyunsun Park; Dongyoung Kim; Junwhan Ahn; Sungjoo Yoo (CODES+ISSS, 2016)

A dual-retention time architecture towards secure and high performance STT-RAM main memory subsystem. - Taemin Lee; Sungjoo Yoo (ISOCC, 2016)

Selective refresh to avoid read disturb errors in STT-RAM main memory. - Taemin Lee; Sungjoo Yoo (ISOCC, 2016)

Compression of Deep Convolutional Neural Networks for Fast and Low Power Mobile Applications. - Yong-Deok Kim; Eunhyeok Park; Sungjoo Yoo; Taelim Choi; Lu Yang; Dongjun Shin (ICLR (Poster), 2016)

AIM: Energy-Efficient Aggregation Inside the Memory Hierarchy. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (ACM Trans. Archit. Code Optim., 2016)

Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (IEEE Trans. Computers, 2016)

Array Organization and Data Management Exploration in Racetrack Memory. - Zhenyu Sun 001; Xiuyuan Bi; Wenqing Wu; Sungjoo Yoo; Hai (Helen) Li (IEEE Trans. Computers, 2016)

Memory Access Scheduling for a Smart TV. - Cheul-Hee Hahm; Sunggu Lee; Taeyoung Lee; Sungjoo Yoo (IEEE Trans. Circuits Syst. Video Technol., 2016)

Improving Write Performance by Controlling Target Resistance Distributions in MLC PRAM. - Youngsik Kim; Sungjoo Yoo; Sunggu Lee (ACM Trans. Design Autom. Electr. Syst., 2016)

Differential Write-Conscious Software Design on Phase-Change Memory: An SQLite Case Study. - Sungkwang Lee; Taemin Lee; Hyunsun Park; Junwhan Ahn; Sungjoo Yoo; Youjip Won; Sunggu Lee (ACM Trans. Design Autom. Electr. Syst., 2016)

Low-Power Hybrid Memory Cubes With Link Power Management and Two-Level Prefetching. - Junwhan Ahn; Sungjoo Yoo; Kiyoung Choi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Weighted-Entropy-Based Quantization for Deep Neural Networks. - Eunhyeok Park; Junwhan Ahn; Sungjoo Yoo (CVPR, 2017)

Making DRAM Stronger Against Row Hammering. - Mungyu Son; Hyunsun Park; Junwhan Ahn; Sungjoo Yoo (DAC, 2017)

A novel zero weight/activation-aware hardware architecture of convolutional neural network. - Dongyoung Kim; Junwhan Ahn; Sungjoo Yoo (DATE, 2017)

An FPGA-based platform for non volatile memory emulation. - Taemin Lee; Sungjoo Yoo (NVMSA, 2017)

ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator. - Jinho Lee; Heesu Kim; Sungjoo Yoo; Kiyoung Choi; H. Peter Hofstee; Gi-Joon Nam; Mark Nutter; Damir A. Jamsek (Proc. VLDB Endow., 2017)

Reinforcement Learning-Assisted Garbage Collection to Mitigate Long-Tail Latency in SSD. - Won-Kyung Kang; Dongkun Shin; Sungjoo Yoo (ACM Trans. Embed. Comput. Syst., 2017)

Dynamic management of key states for reinforcement learning-assisted garbage collection to reduce long tail latency in SSD. - Won-Kyung Kang; Sungjoo Yoo (DAC, 2018)

Joint optimization of speed, accuracy, and energy for embedded image recognition systems. - Duseok Kang; Donghyun Kang; Jintaek Kang; Sungjoo Yoo; Soonhoi Ha (DATE, 2018)

Value-Aware Quantization for Training and Inference of Neural Networks. - Eunhyeok Park; Sungjoo Yoo; Peter Vajda (ECCV (4), 2018)

Energy-Efficient Neural Network Accelerator Based on Outlier-Aware Low-Precision Computation. - Eunhyeok Park; Dongyoung Kim; Sungjoo Yoo (ISCA, 2018)

FPGA Prototyping of Low-Precision Zero-Skipping Accelerator for Neural Networks. - Dongyoung Kim; Soobeom Kim; Sungjoo Yoo (RSP, 2018)

Deep Learning Inference in Facebook Data Centers: Characterization, Performance Optimizations and Hardware Implications. - Jongsoo Park; Maxim Naumov; Protonu Basu; Summer Deng; Aravind Kalaiah; Daya Shanker Khudia; James Law; Parth Malani; Andrey Malevich; Nadathur Satish; Juan Miguel Pino; Martin Schatz; et al. (CoRR, 2018)

Precision Highway for Ultra Low-Precision Quantization. - Eunhyeok Park; Dongyoung Kim; Sungjoo Yoo; Peter Vajda (CoRR, 2018)

ZeNA: Zero-Aware Neural Network Accelerator. - Dongyoung Kim; Junwhan Ahn; Sungjoo Yoo (IEEE Des. Test, 2018)

McDRAM: Low Latency and Energy-Efficient Matrix Computations in DRAM. - Hyunsung Shin; Dongyoung Kim; Eunhyeok Park; Sungho Park; Yongsik Park; Sungjoo Yoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Nonvolatile Write Buffer-Based Journaling Bypass for Storage Write Reduction in Mobile Devices. - Mungyu Son; Junwhan Ahn; Sungjoo Yoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Machine Learning at Facebook: Understanding Inference at the Edge. - Carole-Jean Wu; David Brooks 001; Kevin Chen; Douglas Chen; Sy Choudhury; Marat Dukhan; Kim M. Hazelwood; Eldad Isaac; Yangqing Jia; Bill Jia; Tommer Leyvand; Hao Lu; et al. (HPCA, 2019)

Tag2Pix: Line Art Colorization Using Text Tag With SECat and Changing Loss. - Hyunsu Kim; Ho Young Jhoo; Eunhyeok Park; Sungjoo Yoo (ICCV, 2019)

Machine Learning-Based Automatic Generation of eFuse Configuration in NAND Flash Chip. - Jisuk Kim; Jinyub Lee; Sungjoo Yoo (ITC, 2019)

Low-overhead, one-cycle timing-error detection and correction technique for flip-flop based pipelines. - Jongeun Koo; Eunhyeok Park; Dongyoung Kim; Junki Park; Sungju Ryu; Sungjoo Yoo; Jae-Joon Kim (IEICE Electron. Express, 2019)

A Novel In-DRAM Accelerator Architecture for Binary Neural Network. - Haerang Choi; Yosep Lee; Jae-Joon Kim; Sungjoo Yoo (COOL CHIPS, 2020)

PROFIT: A Novel Training Method for sub-4-bit MobileNet Models. - Eunhyeok Park; Sungjoo Yoo (ECCV (6), 2020)

MEANTIME: Mixture of Attention Mechanisms with Multi-temporal Embeddings for Sequential Recommendation. - Sung Min Cho; Eunhyeok Park; Sungjoo Yoo (RecSys, 2020)

McDRAM v2: In-Dynamic Random Access Memory Systolic Array Accelerator to Address the Large Model Problem in Deep Neural Networks on the Edge. - Seunghwan Cho; Haerang Choi; Eunhyeok Park; Hyunsung Shin; Sungjoo Yoo (IEEE Access, 2020)

Reducing DRAM refresh power consumption by runtime profiling of retention time and dual-row activation. - Haerang Choi; Do-sun Hong; Jaesung Lee; Sungjoo Yoo (Microprocess. Microsystems, 2020)

$Q$ -Value Prediction for Reinforcement Learning Assisted Garbage Collection to Reduce Long Tail Latency in SSD. - Won-Kyung Kang; Sungjoo Yoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Exploiting Spatial Dimensions of Latent in GAN for Real-Time Image Editing. - Hyunsu Kim; Yunjey Choi; Junho Kim; Sungjoo Yoo; Youngjung Uh (CVPR, 2021)

Fine-grained Semantics-aware Representation Enhancement for Self-supervised Monocular Depth Estimation. - Hyunyoung Jung 001; Eunhyeok Park; Sungjoo Yoo (ICCV, 2021)

FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks. - Soobeom Kim; Seunghwan Cho; Eunhyeok Park; Sungjoo Yoo (RSP, 2021)

Augmenting Few-Shot Learning With Supervised Contrastive Learning. - Taemin Lee; Sungjoo Yoo (IEEE Access, 2021)

StyleMapGAN: Exploiting Spatial Dimensions of Latent in GAN for Real-time Image Editing. - Hyunsu Kim; Yunjey Choi; Junho Kim; Sungjoo Yoo; Youngjung Uh (CoRR, 2021)

On the Overlooked Significance of Underutilized Contextual Features in Recent News Recommendation Models. - Sung Min Cho; Hongjun Lim; Keunchan Park; Sungjoo Yoo; Eunhyeok Park (CoRR, 2021)

BASQ: Branch-wise Activation-clipping Search Quantization for Sub-4-bit Neural Networks. - Han-Byul Kim; Eunhyeok Park; Sungjoo Yoo (ECCV (12), 2022)

TernaryNeRF: Quantizing Voxel Grid-based NeRF Models. - Seungyeop Kang; Sungjoo Yoo (RSP, 2022)

Memory Efficient Patch-based Training for INR-based GANs. - Namwoo Lee; Hyunsu Kim; Gayoung Lee; Sungjoo Yoo; Yunjey Choi (CoRR, 2022)

Introduction to the Special Section on Energy-Efficient AI Chips. - Vikas Chandra; Yiran Chen 001; Sungjoo Yoo (ACM Trans. Design Autom. Electr. Syst., 2022)

AnyFlow: Arbitrary Scale Optical Flow with Implicit Neural Representation. - Hyunyoung Jung 001; Zhuo Hui; Lei Luo; Haitao Yang; Feng Liu 015; Sungjoo Yoo; Rakesh Ranjan; Denis Demandolx (CVPR, 2023)

Multi-scale Local Implicit Keypoint Descriptor for Keypoint Matching. - JongMin Lee; Eunhyeok Park; Sungjoo Yoo (CVPR Workshops, 2023)

NIPQ: Noise proxy-based Integrated Pseudo-Quantization. - Juncheol Shin; Junhyuk So; Sein Park; Seungyeop Kang; Sungjoo Yoo; Eunhyeok Park (CVPR, 2023)

Masked Token Similarity Transfer for Compressing Transformer-Based ASR Models. - Euntae Choi; Youshin Lim; Byeong-Yeol Kim; Hyung Yong Kim; Hanbin Lee; Yunkyu Lim; Seung Woo Yu; Sungjoo Yoo (ICASSP, 2023)

Retrospective: A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing. - Junwhan Ahn; Sungpack Hong; Sungjoo Yoo; Onur Mutlu; Kiyoung Choi (CoRR, 2023)

MetaMix: Meta-State Precision Searcher for Mixed-Precision Activation Quantization. - Han-Byul Kim; Joo Hyung Lee; Sungjoo Yoo; Hong-Seok Kim (AAAI, 2024)

MFOS: Model-Free & One-Shot Object Pose Estimation. - JongMin Lee; Yohann Cabon; Romain Brégier; Sungjoo Yoo; Jérôme Revaud (AAAI, 2024)

Geometry Transfer for Stylizing Radiance Fields. - Hyunyoung Jung 001; Seonghyeon Nam; Nikolaos Sarafianos; Sungjoo Yoo; Alexander Sorkine-Hornung; Rakesh Ranjan (CVPR, 2024)

TCP: A Tensor Contraction Processor for AI Workloads Industrial Product. - Hanjoon Kim; Younggeun Choi; Junyoung Park; Byeongwook Bae; Hyunmin Jeong; Sang Min Lee 014; Jeseung Yeon; Minho Kim; Changjae Park; Boncheol Gu; Changman Lee; Jaeick Bae; et al. (ISCA, 2024)

Breaking MLPerf Training: A Case Study on Optimizing BERT. - Yongdeok Kim; Jaehyung Ahn; Myeongwoo Kim; Changin Choi; Heejae Kim; Narankhuu Tuvshinjargal; Seungwon Lee; Yanzi Zhang; Yuan Pei; Xiongzhan Linghu; Jingkun Ma; Lin Chen; et al. (CoRR, 2024)

Baking Relightable NeRF for Real-time Direct/Indirect Illumination Rendering. - Euntae Choi; Vincent Carpentier; Seunghun Shin; Sungjoo Yoo (CoRR, 2024)

Phys3DGS: Physically-based 3D Gaussian Splatting for Inverse Rendering. - Euntae Choi; Sungjoo Yoo (CoRR, 2024)

NeRF-PIM: PIM Hardware-Software Co-Design of Neural Rendering Networks. - Jaeyoung Heo; Sungjoo Yoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Dense-SfM: Structure from Motion with Dense Consistent Matching. - JongMin Lee; Sungjoo Yoo (CVPR, 2025)

FuriosaAI RNGD: A Tensor Contraction Processor for Sustainable AI Computing. - Younggeun Choi; Junyoung Park; Sang Min Lee 014; Jeseung Yeon; Minho Kim; Changjae Park; Byeongwook Bae; Hyunmin Jeong; Hanjoon Kim; June Paik; Nuno P. Lopes; Sungjoo Yoo (IEEE Micro, 2025)

Rotate, Clip, and Partition: Towards W2A4KV4 Quantization by Integrating Rotation and Learnable Non-uniform Quantizer. - Euntae Choi; Sumin Song; Woosang Lim; Sungjoo Yoo (CoRR, 2025)

Grouped Sequency-arranged Rotation: Optimizing Rotation Transformation for Quantization for Free. - Euntae Choi; Sumin Song; Woosang Lim; Sungjoo Yoo (CoRR, 2025)

Gaussian Weight Sampling for Scalable, Efficient and Stable Pseudo-Quantization Training. - Myeonghwan Ahn; Sungjoo Yoo (CoRR, 2025)

NSNQuant: A Double Normalization Approach for Calibration-Free Low-Bit Vector Quantization of KV Cache. - Donghyun Son; Euntae Choi; Sungjoo Yoo (CoRR, 2025)