Why is less information from logic simulation more useful in fault simulation? - Sheldon B. Akers Jr.; Sungju Park; Balakrishnan Krishnamurthy; Ashok Swaminathan (ITC, 1990)

A Graph Theoretic Approach to Partial Scan Design by K-Cycle Elimination. - Sungju Park; Sheldon B. Akers (ITC, 1992)

Parity bit calculation and test signal compaction for BIST applications. - Sungju Park; Sheldon B. Akers (J. Electron. Test., 1992)

A New Complete Diagnosis Patterns for Wiring Interconnects. - Sungju Park (DAC, 1996)

A New IEEE 1149.1 Boundary Scan Design for the Detection of Delay Defects. - Sungju Park; Taehyung Kim (DATE, 2000)

A partial scan design by unifying structural analysis and testabilities. - Jongwook Park; Sang-Hoon Shin; Sungju Park (ISCAS, 2000)

A Microcode-Based Memory BIST Implementing Modified March Algorithm. - Dongkyu Youn; Taehyung Kim; Sungju Park (Asian Test Symposium, 2001)

Minimization of OPKFDDs Using Genetic Algorithms. - Migyoung Jung; Gueesang Lee; Sungju Park; Rolf Drechsler (DSD, 2001)

Scalable data management using user-based caching and prefetching in distributed virtual environments. - Sungju Park; Dongman Lee; Mingyu Lim; Chansu Yu (VRST, 2001)

A Simple Wrapped Core Linking Module for SoC Test Access. - Jaehoon Song; Sungju Park (Asian Test Symposium, 2002)

A New Boundary Matching Algorithm Based on Edge Detection. - NamRye Son; YoJin Yang; Gueesang Lee; Sungju Park (EurAsia-ICT, 2002)

A Genetic Algorithm for the Minimization of OPKFDDs. - Migyoung Jung; Gueesang Lee; Sungju Park; Rolf Drechsler (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

An Efficient Buffer Allocation Technique for Virtual Lanes in InfiniBand Networks. - Hyunbean Yi; Sungju Park; Misook Kim; Kiman Jeon (Human.Society@Internet 2003, 2003)

A new state assignment technique for testing and low power. - Sungju Park; Sangwook Cho; Seiyang Yang; Maciej J. Ciesielski (DAC, 2004)

The educational use of home robots for children. - Jeonghye Han; Miheon Jo; Sungju Park; Sungho Kim (RO-MAN, 2005)

Hybrid test data compression technique for SOC scan testing. - Sangwook Cho; Jaehoon Song; Hyunbean Yi; Sungju Park (SoCC, 2005)

Interconnect Delay Fault Test on Boards and SoCs with Multiple Clock Domains. - Hyunbean Yi; Jaehoon Song; Sungju Park (ITC, 2006)

Efficient Interconnect Test Patterns for Crosstalk and Static Faults. - Pyoungwoo Min; Hyunbean Yi; Jaehoon Song; Sanghyeon Baeg; Sungju Park (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips. - Jaehoon Song; Hyunbean Yi; Juhee Han; Sungju Park (Asia-Pacific Computer Systems Architecture Conference, 2007)

Design Reuse of on/off-Chip Bus Bridge for Efficient Test Access to AMBA-based SoC. - Jaehoon Song; Juhee Han; Dooyoung Kim; Hyunbean Yi; Sungju Park (ATS, 2007)

Design of Test Access Mechanism for AMBA-Based System-on-a-Chip. - Jaehoon Song; Piljae Min; Hyunbean Yi; Sungju Park (VTS, 2007)

A Design-for-Debug (DfD) for NoC-Based SoC Debugging via NoC. - Hyunbean Yi; Sungju Park; Sandip Kundu (ATS, 2008)

An Efficient Secure Scan Design for an SoC Embedding AES Core. - Jaehoon Song; Taejin Jung; Junseop Lee; Hyeran Jeong; Byeongjin Kim; Sungju Park (ITC, 2008)

Comparative study of effects of language instruction program using intelligence robot and multimedia on linguistic ability of young children. - Eun-ja Hyun; So-yeon Kim; Siekyung Jang; Sungju Park (RO-MAN, 2008)

Low-Cost Scan Test for IEEE-1500-Based SoC. - Hyunbean Yi; Jaehoon Song; Sungju Park (IEEE Trans. Instrum. Meas., 2008)

Highly Compact Interconnect Test Patterns for Crosstalk and Static Faults. - Jaehoon Song; Juhee Han; Hyunbean Yi; Taejin Jung; Sungju Park (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

An Efficient SoC Test Technique by Reusing On/Off-Chip Bus Bridge. - Jaehoon Song; Hyunbean Yi; Juhee Han; Sungju Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A trial english class with a teaching assistant robot in elementary school. - Jeonghye Han; Seungmin Lee; Bokhyun Kang; Sungju Park; Jungkwan Kim; Myungsook Kim; Mihee Kim (HRI, 2010)

A Scan Cell Design for Scan-Based Debugging of an SoC With Multiple Clock Domains. - Hyunbean Yi; Sandip Kundu; Sangwook Cho; Sungju Park (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

On-Chip Support for NoC-Based SoC Debugging. - Hyunbean Yi; Sungju Park; Sandip Kundu (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Efficient Use of Unused Spare Columns to Improve Memory Error Correcting Rate. - Umair Ishaq; Jihun Jung; Jaehoon Song; Sungju Park (Asian Test Symposium, 2011)

Characterizing the Capacitive Crosstalk in SRAM Cells Using Negative Bit-Line Voltage Stress. - Jongsun Bae; Sanghyeon Baeg; Sungju Park (IEEE Trans. Instrum. Meas., 2012)

An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory. - Syed Mohsin Abbas; Soonyoung Lee; Sanghyeon Baeg; Sungju Park (IEEE Trans. Computers, 2014)

Scan-Puf: Puf Elements Selection Methods for Viable IC Identification. - Dooyoung Kim; Muhammad Adil Ansari; Jihun Jung; Sungju Park (ATS, 2015)

Efficient diagnosis technique for aging defects on automotive semiconductor chips. - Jihun Jung; Muhammad Adil Ansari; Dooyoung Kim; Hyunbean Yi; Sungju Park (ETS, 2015)

Time-multiplexed test access architecture for stacked integrated circuits. - Muhammad Adil Ansari; Jihun Jung; Dooyoung Kim; Sungju Park (IEICE Electron. Express, 2016)

On Diagnosing the Aging Level of Automotive Semiconductor Devices. - Jihun Jung; Muhammad Adil Ansari; Dooyoung Kim; Hyunbean Yi; Sungju Park (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Time-Multiplexed 1687-Network for Test Cost Reduction. - Muhammad Adil Ansari; Jihun Jung; Dooyoung Kim; Sungju Park (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Erratum to "Time-Multiplexed-Network for Test Cost Reduction". - Muhammad Adil Ansari; Jihun Jung; Dooyoung Kim; Sungju Park (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

CAN-Based Aging Monitoring Technique for Automotive ASICs With Efficient Soft Error Resilience. - Jinuk Kim; Muhammad Ibtesam; Dooyoung Kim; Jihun Jung; Sungju Park (IEEE Access, 2020)

Test Architecture for Systolic Array of Edge-Based AI Accelerator. - Umair Saeed Solangi; Muhammad Ibtesam; Muhammad Adil Ansari; Jinuk Kim; Sungju Park (IEEE Access, 2021)

Master-slave based test cost reduction method for DNN accelerators. - Umair Saeed Solangi; Muhammad Ibtesam; Sungju Park (IEICE Electron. Express, 2021)

Time multiplexed LBIST for in-field testing of automotive AI accelerators. - Umair Saeed Solangi; Muhammad Ibtesam; Sungju Park (IEICE Electron. Express, 2021)

Highly Efficient Test Architecture for Low-Power AI Accelerators. - Muhammad Ibtesam; Umair Saeed Solangi; Jinuk Kim; Muhammad Adil Ansari; Sungju Park (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Reliable Test Architecture With Test Cost Reduction for Systolic-Based DNN Accelerators. - Muhammad Ibtesam; Umair Saeed Solangi; Jinuk Kim; Muhammad Adil Ansari; Sungju Park (IEEE Trans. Circuits Syst. II Express Briefs, 2022)