Comparison of bootstrap approaches for estimation of uncertainties of DTI parameters. - SungWon Chung; Ying Lu 006; Roland G. Henry (NeuroImage, 2006)

Probabilistic streamline q-ball tractography using the residual bootstrap. - Jeffrey I. Berman; SungWon Chung; Pratik Mukherjee; Christopher Paul Hess; Eric T. Han; Roland G. Henry (NeuroImage, 2008)

Whole brain voxel-wise analysis of single-subject serial DTI by permutation testing. - SungWon Chung; Daniel Pelletier; Michaël Sdika; Ying Lu 006; Jeffrey I. Berman; Roland G. Henry (NeuroImage, 2008)

Adaptive Predistortion Using a DeltaSigma Modulator for Automatic Inversion of Power Amplifier Nonlinearity. - Hyun Ho Boo; SungWon Chung; Joel L. Dawson (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Bootstrap quantification of cardiac pulsation artifact in DTI. - SungWon Chung; Blandine Courcot; Michaël Sdika; Kristin Moffat; Caroline D. Rae; Roland G. Henry (NeuroImage, 2010)

Digitally Assisted Feedforward Compensation of Cartesian-Feedback Power-Amplifier Systems. - Hyun Ho Boo; SungWon Chung; Joel L. Dawson (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A 2.4-GHz, 27-dBm Asymmetric Multilevel Outphasing Power Amplifier in 65-nm CMOS. - Philip A. Godoy; SungWon Chung; Taylor W. Barton; David J. Perreault; Joel L. Dawson (IEEE J. Solid State Circuits, 2012)

Energy-efficient wireless transmitter architecture for mobile multimedia. - SungWon Chung (2014)

A 200-MS/s 98-dB SNR track-and-hold in 0.25-um GaN HEMT. - SungWon Chung; Hae-Seung Lee (CICC, 2015)

Outphasing multi-level RF-PWM signals for inter-band carrier aggregation in digital transmitters. - SungWon Chung; Rui Ma; Koon Hoo Teo; Kieran Parsons (RWS, 2015)

The Design of the NetBSD I/O Subsystems. - SungWon Chung (CoRR, 2016)

15.4 A 1024-element scalable optical phased array in 0.18µm SOI CMOS. - SungWon Chung; Hooman Abediasl; Hossein Hashemi 001 (ISSCC, 2017)

Poly-Crystalline Silicon Waveguide Devices on Hollow Deep Trench Isolation in Standard Foundry Bulk Silicon Process. - SungWon Chung; Makoto Nakai; Edward Preisler; Hossein Hashemi 001 (OFC, 2018)

A Monolithically Integrated Large-Scale Optical Phased Array in Silicon-on-Insulator CMOS. - SungWon Chung; Hooman Abediasl; Hossein Hashemi 001 (IEEE J. Solid State Circuits, 2018)

A Compact Operational Amplifier with Load-Insensitive Stability Compensation for High-Precision Transducer Interface. - Zhanghao Yu; Xi Yang; SungWon Chung (Sensors, 2018)

Tightly Coupled Machine Learning Coprocessor Architecture With Analog In-Memory Computing for Instruction-Level Acceleration. - SungWon Chung; Jiemi Wang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

19.1 Optical Phased-Array FMCW LiDAR with On-Chip Calibration. - SungWon Chung; Makoto Nakai; Samer B. Idres; Yongwei Ni; Hossein Hashemi 001 (ISSCC, 2021)

A 1024-Channel Simultaneous Recording Neural SoC with Stimulation and Real-Time Spike Detection. - Do-Yeon Yoon; Sonal Pinto; SungWon Chung; Paul Merolla; Thong-Wei Koh; Dongjin Seo (VLSI Circuits, 2021)