A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications. - Sunkwon Kim; Jong-Kwan Woo; Woo-Yeol Shin; Gi-Moon Hong; Hyongmin Lee; Hyunjoong Lee; Suhwan Kim 001 (ISLPED, 2011)

A CMOs readout integrated circuit with wide dynamic range for a CNT bio-sensor array system. - Hyunjoong Lee; Hyongmin Lee; Jong-Kwan Woo; Sunkwon Kim; Young June Park; Suhwan Kim 001 (ISLPED, 2011)

A comparator-based cyclic analog-to-digital converter with boosted preset voltage. - Jong-Kwan Woo; Tae-Hoon Kim; Hyongmin Lee; Sunkwon Kim; Hyunjoong Lee; Suhwan Kim 001 (ISLPED, 2011)

A 4.8Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface. - Woo-Yeol Shin; Gi-Moon Hong; Hyongmin Lee; Jaeduk Han; Sunkwon Kim; Kyu-Sang Park; Dong-Hyuk Lim; Jung-Hoon Chun; Deog-Kyoon Jeong; Suhwan Kim 001 (ISSCC, 2011)

Neural recording system with low-noise analog front-end and comparator-based cyclic ADC. - Susie Kim; Seung-In Na; Tae-Hoon Kim; Hyunjoong Lee; Sunkwon Kim; Cyuyeol Rhee; Suhwan Kim 001 (SoCC, 2012)

A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System. - Sunkwon Kim; Jong-Kwan Woo; Woo-Yeol Shin; Gi-Moon Hong; Hyongmin Lee; Hyunjoong Lee; Suhwan Kim 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparator. - Taehoon Kim; Sunkwon Kim; Jong-Kwan Woo; Hyongmin Lee; Suhwan Kim 001 (SoCC, 2015)