A 102-Gb/s/lane 1.4-Vppd Linear Range PAM-8 Receiver Frontend With Multi-Path Continuous-Time Linear Equalization in 28-nm CMOS. - Sangwan Lee; Hyeongmin Seo; Seungwoo Son; Sunoh Yeom; Jaeduk Han (IEEE Trans. Circuits Syst. II Express Briefs, 2024)