Op-amp swing reduction in sigma-delta modulators. - Sunwoo Kwon; Franco Maloberti (ISCAS (1), 2004)

A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier. - Sunwoo Kwon; Hoi Lee (ISCAS, 2006)

A 14mW Multi-bit ΔΣ Modulator with 82dB SNR and 86dB DR for ADSL2+. - Sunwoo Kwon; Franco Maloberti (ISSCC, 2006)

A 5.4mW 2-Channel Time-Interleaved Multi-bit ΔΣ Modulator with 80dB SNR and 85dB DR for ADSL. - Kye-Shin Lee; Sunwoo Kwon; Franco Maloberti (ISSCC, 2006)

A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement. - Sunwoo Kwon; Un-Ku Moon (ISCAS, 2007)

Mixed-Order Sturdy MASH Delta-Sigma Modulator. - Nima Maghari; Sunwoo Kwon; Gabor C. Temes; Un-Ku Moon (ISCAS, 2007)

A Power-Efficient Two-Channel Time-Interleaved ΣΔ Modulator for Broadband Applications. - Kye-Shin Lee; Sunwoo Kwon; Franco Maloberti (IEEE J. Solid State Circuits, 2007)

74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using 35dB opamp gain. - Nima Maghari; Sunwoo Kwon; Un-Ku Moon (CICC, 2008)

A continuous-time input pipeline ADC with inherent anti-alias filtering. - David Gubbins; Sunwoo Kwon; Bumha Lee; Pavan Kumar Hanumolu; Un-Ku Moon (CICC, 2009)

An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. - Sunwoo Kwon; Pavan Kumar Hanumolu; Sang-Ho Kim; Sung-No Lee; Seung-Bin You; Ho-Jin Park; Jae-Whui Kim; Un-Ku Moon (CICC, 2009)

A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. - Tawfiq Musah; Sunwoo Kwon; Hasnain Lakdawala; Krishnamurthy Soumyanath; Un-Ku Moon (CICC, 2009)

74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain. - Nima Maghari; Sunwoo Kwon; Un-Ku Moon (IEEE J. Solid State Circuits, 2009)

Comments on "Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators". - Sunwoo Kwon; Franco Maloberti (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A 2.4ps resolution 2.1mW second-order noise-shaped time-to-digital converter with 3.2ns range in 1MHz bandwidth. - Brian Young; Sunwoo Kwon; Amr Elshazly; Pavan Kumar Hanumolu (CICC, 2010)

A 0.028% THD+N, 91% power-efficiency, 3-level PWM Class-D amplifier with a true differential front-end. - Sunwoo Kwon; Injeong Kim; Shinyoung Yi 002; Sangheyub Kang; Sangheon Lee; Taeho Hwang; Byoungkwon Moon; Yunyoung Choi; Hosung Sung; Jinseok Koh (ISSCC, 2012)

A 0.018% THD+N, 88-dB PSRR PWM Class-D Amplifier for Direct Battery Hookup. - Youngkil Choi; Wonho Tak; Younghyun Yoon; Jeongjin Roh; Sunwoo Kwon; Jinseok Koh (IEEE J. Solid State Circuits, 2012)

A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling. - Il-Hoon Jang; Min-Jae Seo; Sang-Hyun Cho; Jae-Keun Lee; Seung-Yeob Baek 002; Sunwoo Kwon; Michael Choi; Hyungjong Ko; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2018)