A 40nm 4.81TFLOPS/W 8b Floating-Point Training Processor for Non-Sparse Neural Networks Using Shared Exponent Bias and 24-Way Fused Multiply-Add Tree. - Jeongwoo Park; Sunwoo Lee 005; Dongsuk Jeon (ISSCC, 2021)

Dynamic Block-Wise Local Learning Algorithm for Efficient Neural Network Training. - Gwangho Lee; Sunwoo Lee 005; Dongsuk Jeon (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A low power neural network training processor with 8-bit floating point with a shared exponent bias and fused multiply add trees. - Jeongwoo Park; Sunwoo Lee 005; Dongsuk Jeon (AICAS, 2022)

Toward Efficient Low-Precision Training: Data Format Optimization and Hysteresis Quantization. - Sunwoo Lee 005; Jeongwoo Park; Dongsuk Jeon (ICLR, 2022)

A Neural Network Training Processor With 8-Bit Shared Exponent Bias Floating Point and Multiple-Way Fused Multiply-Add Trees. - Jeongwoo Park; Sunwoo Lee 005; Dongsuk Jeon (IEEE J. Solid State Circuits, 2022)

A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array. - Sunwoo Lee 005; Jeongwoo Park; Dongsuk Jeon (ESSCIRC, 2023)

A0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS. - Sungjin Park; Sunwoo Lee 005; Jeongwoo Park; Hyeong-Seok Choi; Dongsuk Jeon (ISSCC, 2023)

ALAM: Averaged Low-Precision Activation for Memory-Efficient Training of Transformer Models. - Sunghyeon Woo; Sunwoo Lee 005; Dongsuk Jeon (ICLR, 2024)

A 5.6µW 10-Keyword End-to-End Keyword Spotting System Using Passive-Averaging SAR ADC and Sign-Exponent-Only Layer Fusion with 92.7% Accuracy. - Sungjin Park; Kwanghyun Shin; Dongkwon Lee; Minyoung Kang; Sunwoo Lee 005; Youngmin Park; Mingoo Seok; Dongsuk Jeon (VLSI Technology and Circuits, 2024)

An 83.16-TOPS/W Voltage-Scalable Time-Domain CNN Accelerator with Full-Swing Delay Cell and Gray-Code TDC in 28-nm CMOS. - Sangsu Jeong; Huiwon Yun; Dongkwon Lee; Sunwoo Lee 005; Minyoung Kang; Dongsuk Jeon (CICC, 2025)

PaCA: Partial Connection Adaptation for Efficient Fine-Tuning. - Sunghyeon Woo; Sol Namkung; Sunwoo Lee 005; Inho Jeong; Beomseok Kim; Dongsuk Jeon (ICLR, 2025)

A Real-Time Speech Enhancement Processor for Hearing Aids in 28-nm CMOS. - Sungjin Park; Sunwoo Lee 005; Jeongwoo Park; Hyeong-Seok Choi; Kyogu Lee; Dongsuk Jeon (IEEE J. Solid State Circuits, 2025)